MSC711x Application Development System (MSC711xADS) Reference Manual, Rev. 1
18
Freescale Semiconductor
Hardware Configuration and Boot
Figure 2-11. JP7, PCI Enable/Disable
2.4.15 Host (MPC8272) Enable/Disable (JP8)
JP8 enables and disables the host (MPC8272). When enabled, the MPC8272 is connected to the MSC711x. When
disabled, the MSC711x operates in stand-alone mode, regardless of the MPC8272 state.
• In the enable (1-2) position, the MPC8272 is enabled and connected to the MSC711x.
• In the disabled (2-3) position, the state of the MPC8272 does not influence the MSC711x, which therefore works
independently in stand-alone mode.
Note:
The Disable mode is not yet supported. As a work around, disconnecting the MPC8272
HRESET
signal from the MSC711x
HRESET
signal yields the same results. That is, the
MSC711x work independently of the MPC8272 state.
Figure 2-12. JP8, Host Enable
2.5 MSC711xADS Boot
MSC711x devices can boot from the HDI16 bus or from an external EEPROM with a serial I
2
C interface. The
MSC711xADS uses a serial EEPROM with a 256 Kb capacity (for example, M24256-B from Tmicroelectronics
Co.
1
). The EEPROM memory is organized as eight 32 KB rows. This device can perform a hardware-based write-
protect of its memory map, and it is equipped with a socket so that it can be reprogrammed by an external
programmer. A PLD provides an optional connection to the host PC, which allows the user to reprogram the on-
board boot EEPROM. At reset, the address of the I
2
C EEPROM is set to 000. The external pins of the I
2
C
EEPROM are described in Figure 2-13 and Table 2-7. The state of the
SCL
and
SDA
lines is indicated by red and
green LEDs.
1. Other devices that can be used are Microchip 24LC256, ATMEL AT24C256, or CATALYST CAT24WC256.
JP7
1
2
3
Enable
1
2
3
Disable
Factory Default
1
2
3
Enable
1
2
3
Disable
Factory Default
JP8
