NXP Semiconductors P1010RDB-PB Quick Start Manual Download

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P1010RDB-PB Quick Start Guide, Rev. 0

Freescale Semiconductor

Getting Started

Figure 8. Plug in USB to UART Cable

8. The board will boot and show the uboot console message. The board will boot Linux if the uboot

autoboot process is not halted. An example uboot log is shown below:

U-Boot 2013.01-00128-g3eb0606-dirty (Jul 11 2013 - 16:46:36)

CPU: P1010E, Version: 1.0, (0x80f90010)

Core: E500, Version: 5.1, (0x80212151)

Clock Configuration:

CPU0:1000 MHz,

CCB:400 MHz,

DDR:400 MHz (800 MT/s data rate) (Asynchronous), IFC:100 MHz

L1: D-cache 32 kB enabled

I-cache 32 kB enabled

Board: P1010RDB-PB, CPLD Ver: v1.0, ROM Loc: NAND

I2C: ready

SPI: ready

DRAM: Detected UDIMM

1 GiB (DDR3, 32-bit, CL=6, ECC off)

Flash: 32 MiB

L2: 256 KB enabled

NAND: 2048 MiB

Summary of Contents for P1010RDB-PB

Page 1: ...get the revision number This document describes P1010RDB PB and its related hardware kit It also explains and verifies the basic board operations in a step by step format This document shows settings...

Page 2: ...stems are loaded in NAND flash 32 MB NOR Flash is split into two banks by SW1 8 switch 2 Getting Started This section explains Section 2 1 Preloaded Binaries on the Board Section 2 2 Default Booting M...

Page 3: ...ettings result in the following frequency settings CPU 1000 MHz CCB 400 MHz and DDR 800MT s data rate 2 3 Booting the Board Follow the given steps to boot a target board 1 Set the switch settings for...

Page 4: ...4 Plug the USB miniB to typeA cable in the UART0 receptacle as console port Attach the serial cable between the P1010RDB PB UART0 port and a host PC Figure 5 Attaching to a UART Port 5 Install the US...

Page 5: ...pages usbtouartbridgevcpdrivers aspx After finishing the installation you will find the device in your device manager Figure 6 USB to UART Device Driver 6 Configure the serial port of the host PC wit...

Page 6: ...t log is shown below U Boot 2013 01 00128 g3eb0606 dirty Jul 11 2013 16 46 36 CPU P1010E Version 1 0 0x80f90010 Core E500 Version 5 1 0x80212151 Clock Configuration CPU0 1000 MHz CCB 400 MHz DDR 400 M...

Page 7: ...Complex of mini PCIe Slot no link regs 0xffe0a000 PCIe1 Bus 00 00 PCIe2 Root Complex of PCIe Slot no link regs 0xffe09000 PCIe2 Bus 01 01 In serial Out serial Err serial PCB Ver 1 0 Net eTSEC1 PRIME e...

Page 8: ...ns and actual performance may vary over time All operating parameters including typicals must be validated for each customer application by customer s technical experts Freescale does not convey any l...

Page 9: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information NXP P1010RDB PB...