Spread spectrum
S32G2 Vehicle Network Processor - Clock Configuration Guide, Rev. 1, 11/2021
12
NXP Semiconductors
Table 4. Modulation frequency range with center-spread modulation enabled
Symbol
Description
Modulation frequency range
(KHz)
fPLL_MOD
Spread Spectrum Clock Modulation
Frequency
30 – 64
5.2.3 Modulation depth
With center-spread SSCG enabled, the modulation depth for Core, Accelerator and DDR must adhere to
below conditions –
1.
𝑃𝐿𝐿𝐹𝑀[𝑆𝑇𝐸𝑃𝑆𝐼𝑍𝐸] × 𝑃𝐿𝐿𝐹𝑀[𝑆𝑇𝐸𝑃𝑁𝑂] < 18432
2.
𝑀𝐷 % <
𝑓
REF
× 100
𝑃𝐿𝐿𝐷𝐼𝑉[𝑅𝐷𝐼𝑉] × 𝑓
PLL_VCO
5.3 Example code
This section illustrates how to configure modulation frequency and modulation depth with the help of an
example.
Example: Enabling SSCG for CORE_PLL_VCO frequency of 2000 MHz (in case of SSCG disabled),
with modulation frequency of 64 KHz and 1.5% modulation depth.
Table 5. Example values
Variables
Value
f
REF
40 MHz
f
MOD
64 KHz
MD
1.5
In the Spread Spectrum tab in the attached Excel tool, enter the following –
f
PLL_CORE_VCO
with SSCG disabled as 2000 MHz,
f
MOD
as 64 KHz,
MD % as 1.5
And select the FXOSC (
f
REF
) frequency and RDIV from the drop list.