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NXP Semiconductors

UM11665

SC18IS604-EVB evaluation board

I

2

C slave devices can be accessed directly by the SPI master via the SC18IS604 SPI to

I

2

C bridge.

4.1 Headers and jumpers

Please refer to 

Figure 1

 to find the location of connectors and jumpers on the

SC18IS604-EVB evaluation board.

Figure 1. Headers and jumpers

4.2 Jumper settings

JP5 Misc. Header

Jumper on/off

Comment

1 - 2

ON

Pull out and insert current meter if SC18IS604 current is to be

measured

3 - 4

ON

Route GPIO 3 to JP2

5 - 6

ON

Enable pull-up on -INT

7 - 8

ON

Enable pull-up on -RESET

Table 1. Jumper settings

JP1 – SPI Header

Function

1

-INT

2

GROUND

3

SCLK

4

MOSI

5

MISO

6

-CS

7

VCC

Table 2. JP1 - SPI header

UM11665

All information provided in this document is subject to legal disclaimers.

© NXP B.V. 2021. All rights reserved.

User manual

Rev. 1.0 — 19 August 2021

5 / 10

Summary of Contents for SC18IS604-EVB

Page 1: ...Information Content Keywords SC18IS604 SC18IS600 SPI to I 2 C I 2 C Controller I 2 C bridge SPI bridge Abstract SC18IS604 is designed to serve as an interface between the standard SPI of a host and t...

Page 2: ...evaluation board Rev Date Description v 1 0 20210819 Initial version Revision history UM11665 All information provided in this document is subject to legal disclaimers NXP B V 2021 All rights reserved...

Page 3: ...n proper printed circuit board layout and heat sinking design as well as attention to supply filtering transient suppression and I O signal quality The goods provided may not be complete in terms of r...

Page 4: ...wnloadable assets referenced in this document 2 1 Collaborate in the NXP community The NXP community is for sharing ideas and tips ask and answer technical questions and receive input on just about an...

Page 5: ...and jumpers 4 2 Jumper settings JP5 Misc Header Jumper on off Comment 1 2 ON Pull out and insert current meter if SC18IS604 current is to be measured 3 4 ON Route GPIO 3 to JP2 5 6 ON Enable pull up o...

Page 6: ...S604 EVB 4 4 Sample control sequences from SPI master 4 4 1 Register read 0x21 0x00 0xFF Read register 0x00 where 0xFF is an SPI dummy byte 4 4 2 Register write 0x20 0x00 0xAA Write register 0x00 with...

Page 7: ...77 0xCC write AA 77 CC to EEPROM 0x00 0x01 0xA0 0x00 0x01 0x03 0xA1 read 3 bytes from EEPROM 0x06 0xFF 0xFF 0xFF 0xFF read 4 bytes from buffer the last three bytes should be AA 77 CC 4 4 8 Blinking on...

Page 8: ...r s third party customer s Customer is responsible for doing all necessary testing for the customer s applications and products using NXP Semiconductors products in order to avoid a default of the app...

Page 9: ...tings 5 Tab 2 JP1 SPI header 5 Tab 3 JP4 I2C header 6 Tab 4 JP2 GPIO 6 Tab 5 Errata list 7 Figures Fig 1 Headers and jumpers 5 UM11665 All information provided in this document is subject to legal dis...

Page 10: ...gister read 6 4 4 2 Register write 6 4 4 3 GPIO as input 6 4 4 4 GPIO as output 6 4 4 5 I2C clock configuration 7 4 4 6 Device ID read 7 4 4 7 On board EEPROM write and read 7 4 4 8 Blinking on board...

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