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TWR-KL28Z Hardware Description 

TWR-

KL28Z User’s Guide, Rev. 0, 06/2016 

NXP Semiconductors 

 

 

4.2.  Serial and debug adapter (CMSIS-DAP) 

CMSIS –DAP is an open-standard serial and debug adapter. It bridges serial and debug communications 
between a USB host and an embedded target processor as shown in 

Figure 4

. CMSIS-DAP features a 

mass storage device (MSD) bootloader, which provides a quick and easy mechanism for loading 
different CMSIS-DAP Applications such as flash programmers, run-control debug interfaces, serial-to-
USB converters, and more. Two or more CMSIS-DAP applications can run simultaneously. For 
example, run-control debug application and serial-to-USB converter runs in parallel to provide a virtual 
COM communication interface while allowing code debugging via CMSIS-DAP with just single USB 
connection. These two applications are provided in a single code package. Refer to the CMSIS-DAP 
User’s Guide for more details. 

 

 

Figure 4.  CMSIS-DAP block diagram 

CMSIS-DAP is managed by a Kinetis K20 MCU built on the ARM Cortex-M4 core. The CMSIS-DAP 
circuit includes a status LED (D1) and a RESET pushbutton (SW1). The pushbutton asserts the Reset 
signal to the KL28Z target MCU. It can also be used to place the CMSIS-DAP circuit into bootloader 
mode by holding down the RESET pushbutton while plugging the USB cable to USB connector J13. 
Once the CMSIS-DAP enters bootloader mode, other CMSIS-DAP applications such as debug app can 
be programmed. SPI and GPIO signals provide an interface to the SWD debug port of the KL28Z. 
Additionally, signal connections are available to implement a UART serial channel. The CMSIS-DAP 
circuit receives power when the USB connector is plugged into a USB host. 

4.2.1.  Debugging interface 

Signals with SPI and GPIO capability are used to connect directly to the SWD of the KL28Z. These 
signals are also brought out to a standard 10-pin Cortex Debug connector (J30) as shown in 

Figure 5

. In 

order to isolate the KL28Z MCU from the CMSIS-DAP circuit and use J30 to connect to an off-board 

Summary of Contents for TWR-KL28Z

Page 1: ...ircuit offers the user several options for serial communications flash programming and run control debugging The TWR KL28Z microcontroller module is designed to work either in standalone mode or as part of the Tower System a modular development platform that enables rapid prototyping and tool re use through reconfigurable hardware NXP Semiconductors Document Number TWRKL28ZUG User s Guide Rev 0 06...

Page 2: ...t environments 2 Getting Started Refer to the TWR KL28Z Quick Start Package for step by step instructions for getting started with the freedom board See the Jump Start Your Design section at nxp com FREDEVPLA for the Quick Start Package and software lab guides 3 TWR KL28Z Features The TWR KL28Z hardware is a Tower development board assembled with the following features MKL28Z512VLL7 MCU 72 MHz 512...

Page 3: ...TWR KL28Z Features TWR KL28Z User s Guide Rev 0 06 2016 NXP Semiconductors 3 Figure 1 TWR KL28Z block diagram Figure 2 TWR KL28Z feature call outs ...

Page 4: ...gure 3 shows the schematic drawing for the power supply inputs and the on board voltage regulator Figure 3 Power supply schematic NOTE The CMSIS DAP circuit is operational only when a USB cable is connected and supplying power to J10 However the protection circuitry is in place to allow multiple sources to be powered at once Table 2 FRDM KL28Z power supplies Power Supply Name Description P5V_miniU...

Page 5: ...ide for more details Figure 4 CMSIS DAP block diagram CMSIS DAP is managed by a Kinetis K20 MCU built on the ARM Cortex M4 core The CMSIS DAP circuit includes a status LED D1 and a RESET pushbutton SW1 The pushbutton asserts the Reset signal to the KL28Z target MCU It can also be used to place the CMSIS DAP circuit into bootloader mode by holding down the RESET pushbutton while plugging the USB ca...

Page 6: ...ller with USB 2 0 full speed OTG controller in a 100 LQFP package An on board debug circuit CMSIS DAP provides a SWD interface and a power supply input through a mini USB connector as well as serial to USB and CDC class compliant UART interface Table 3 Features of MKL28Z512VLL7 Feature Description Ultra low power 10 low power modes with power and clock gating for optimal peripheral activity and re...

Page 7: ...annel 32 bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion provides lifetime timer capability Human machine interface Connectivity and communications Touch sensing input General purpose input output up to 54 USB full speed OTG controller with on chip transceiver and 5 V to 3 3 V regulator supporting crystal less recovery USB low voltage re...

Page 8: ...IS DAP circuit The reset button can be used to force an external reset event in the target MCU The reset button can also be used to force the CMSIS DAP circuit into bootloader mode 4 3 5 Debug The sole debug interface on all Kinetis L series devices is a Serial Wire Debug SWD port The primary controller of this interface on the TWR KL28Z is the onboard CMSIS DAP circuit However a 2x5 pin Cortex De...

Page 9: ... capacitive electrodes configured as a touch pad as shown in Figure 7 Figure 7 Touch pad connection 4 5 I2C Accelerometer Sensor MMA8451Q is a small low power 3 axis linear accelerometer The device features a selectable I2 C or point to point SPI serial interface with 8 bit accelerometer and 14 bit magnetometer ADC resolution along with smart embedded functions It is interfaced through an I2 C bus...

Page 10: ...are Description TWR KL28Z User s Guide Rev 0 06 2016 10 NXP Semiconductors Figure 8 MMA8451Q schematic diagram Table 5 Accelerometer FXOS8700CQ signal connections MMA8451Q KL28Z SCL PTC11 SDA PTC10 INT1 PTC5 INT2 PTC6 ...

Page 11: ... 4 7 Analog reference voltage The onboard ADC of the TWR KL28Z uses the Reference Voltage High VREFH and Reference Voltage Low VREFL pins to set high and low voltage references for the analog modules By default VREFH is attached to P3V3_KL28Z 3 3 V Supply VREFL is connected to GND Figure 10 VREFH circuit schematic If desired VREFH can use a VDDA independent reference by cut J35 jumper ...

Page 12: ... 12 NXP Semiconductors 4 8 Input output headers The MKL28 MCU is packaged in a 100 pin LQFP Some pins are utilized by on board circuitry but many are directly connected to one of four I O headers J13 J25 J24 J26 as shown in Figure 11 below Figure 11 Input output header ...

Page 13: ...uments for the TWR KL28Z hardware are shown below All documents can be found at nxp com TWR KL28Z Quick Start Guide TWR KL28Z User s Guide TWR KL28Z Schematics PDF KL28 Sub Family Reference Manual 6 Revision History Table 6 Revision history Revision number Date Substantive changes 0 06 2016 Initial release ...

Page 14: ...ility including without limitation consequential or incidental damages Typical parameters that may be provided in NXP data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including typicals must be validated for each customer application by customer s technical experts NXP does not convey any license under it...

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