3
TOWER SYSTEM
• Dual e200z4 CPU architecture
• Dual processing spheres including: CPU, DMA, interrupt controller,
crossbar and MPU for logic level fault detection
• Two statically configurable modes of operation: Lockstep operation
(redundant processing and calculations) and Dual Parallel Mode
(independent core operation)
• Fault Collection Unit, which monitors and manages fault events
• Error correction coding on RAM and flash memory allows detection/
correction of memory errors
• Designed to address safety requirements outlined in IEC61508 (SIL3)
• A SafeAssure Solution
SafeAssure Program:
Functional Safety. Simplified.
Freescale’s SafeAssure functional safety program is designed
to help system manufacturers more easily achieve system compliance with functional
safety standards: International Standards Organization (ISO) 26262 and International
Electrotechnical Commission (IEC) 61508. The program highlights Freescale solutions
—hardware and software—that are optimally designed to support functional safety
implementations and come with a rich set of enablement collateral.
For more information, go to:
freescale.com/safeassure
TWR-PXS2010 Features
