NXP Semiconductors
UM11596
PTN3944 linear equalizer application board user manual
Tables
Front side redrivers U1 – U4 I2C addresses
and corresponding TX lanes ........................... 11
Back side redrivers U5 – U8 I2C addresses
and corresponding TX lanes ........................... 16
Front side redriver K1, K2, and K5 control
switch positions and descriptions ....................17
Back side redrivers K3, K4, and K6 control
switch positions and descriptions ....................19
GUI zip file contents ........................................28
GUI debug interface controls .......................... 29
GUI script controls .......................................... 30
Message controls ............................................ 30
Register controls ............................................. 31
Tab. 10. Examples of script file content ........................ 31
Tab. 11. Device address pulldown menu ...................... 34
Figures
Block diagram ................................................... 5
PTN3944 PCIe add-in-card front side ............... 5
PTN3944 PCIe add-in-card back side ...............6
Front side U1 redrivers schematic .................... 7
Front side U2 redrivers schematic .................... 8
Front side U3 redrivers schematic .................... 9
Front side U4 redrivers schematic .................. 10
Schematic - front side ..................................... 11
Back side U5 redrivers schematic ...................12
Back side U6 redrivers schematic ...................13
Back side U7 redrivers schematic ...................14
Back side U8 redrivers schematic ...................15
Schematic - back side .....................................16
Front side K1 control switch schematic ........... 16
Front side K2 control switch schematic ........... 17
Front side K5 control switch schematic ........... 17
Back side K3 control switch schematic ........... 18
Back side K4 control switch schematic ........... 19
Back side K6 control switch schematic ........... 19
Board control locations ....................................20
PCIe x16 edge finger ...................................... 21
PCIe straddle mount connector .......................22
I2C control schematic ......................................23
Power supply schematic, 3.3 V, or 5 V ............23
Power supply schematic ................................. 24
Power schematic .............................................24
USB-to-I2C tool (NXP LPCUSBSIO) front
side ..................................................................25
USB-to-I2C tool (NXP LPCUSBSIO) back
side ..................................................................25
LPCUSBSIO base board with attached
cable ................................................................26
SW302 ISP switch identified on an
assembled PTN3944 PCIe/LPCUSBSIO
module .............................................................26
CRP DISABLD drive added after releasing
SW302 switch ................................................. 27
Deleting the current firmware.bin .................... 27
Adding the new firmware.bin file ..................... 27
Update firmware added to CRP DISABLD
drive .................................................................28
Graphical user interface (GUI) ........................ 29
Default script population order into the GUI .....30
Example EQ/OSL settings for PCIe Gen 4
TX compliance test ......................................... 32
Example EQ/OSL settings for PCIe Gen 4
RX compliance test ......................................... 33
Device address and Sync PCIe channel
settings ............................................................ 34
UM11596
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© NXP B.V. 2021. All rights reserved.
User manual
Rev. 1 — 14 July 2021
36 / 37
