NXP Semiconductors
UM11596
PTN3944 linear equalizer application board user manual
aaa-042299
GND
PTNVCC1
VDD1V8
FB1
3 A
25 MΩ
C17
0.1 µF
C18
0.1 µF
C19
0.1 µF
C20
0.1 µF
C21
0.1 µF
Figure 8. Schematic - front side
There are four PTN3944 on the front side of the AIC. Each PTN3944 component is
responsible for 4 lanes of transmitters from the motherboard side to PCIe device side.
Each PTN3944 is assigned a unique I
2
C address. See
Designator I
2
C Address
Corresponding PCIe TX Lanes
U1
0x23
CH[0] – PCIe TX[0]
CH[1] – PCIe TX[1]
CH[2] – PCIe TX[2]
CH[3] – PCIe TX[3]
U2
0x22
CH[0] – PCIe TX[4]
CH[1] – PCIe TX[5]
CH[2] – PCIe TX[6]
CH[3] – PCIe TX[7]
U3
0x21
CH[0] – PCIe TX[8]
CH[1] – PCIe TX[9]
CH[2] – PCIe TX[10]
CH[3] – PCIe TX[11]
U4
0x20
CH[0] – PCIe TX[12]
CH[1] – PCIe TX[13]
CH[2] – PCIe TX[14]
CH[3] – PCIe TX[15]
Table 1. Front side redrivers U1 – U4 I
2
C addresses and corresponding TX lanes
UM11596
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© NXP B.V. 2021. All rights reserved.
User manual
Rev. 1 — 14 July 2021
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