NXP Semiconductors
UM11596
PTN3944 linear equalizer application board user manual
TPS62827DMQR
aaa-042317
U9
L1
0.47 µH
VDD_REG
VDD1V8
VIN
C184
4.7 µF
6.3 V
R34
100 kΩ
1 %
EN
PG
GND
GND
GND
SW
FB
5
3
6
1
2
4
C183
10 µF
25 V
C190
10 µF
25 V
C185
10 µF
25 V
R35
200 kΩ
R36
100 kΩ
1 %
C182
120 pF
Figure 25. Power supply schematic
A 3.3 V LDO provides power to I
2
C MUX and I
2
C pull-up resistors. As previously
mentioned, the I
2
C MUX is not populated. The 3.3 V power supplies only the I
2
C pull-
up resistors. The 3.3 V LDO is not populated, and uses 3.3 V from the PCIe gold finger
(close J16 pin 2-3).
C187
10 µF
25 V
aaa-042318
J16
3 pin jumper
3P3V_I2C
5V
U10
REG1117-3.3
GND
C188
10 µF
25 V
3P3V_I2C
GND
GND
3P3V_CONN
1
2
3
3P3V_PCIE
VOUT
TAB
2
4
GND
1
VIN
3
Figure 26. Power schematic
3 LPCUSBSIO module
To demonstrate the programmability of PTN3944 through the I
2
C interface, use the
LPCUSBSIO module with PTN3944 PCIe AIC. The main function of the LPCUSBSIO
module is to provide a USB-to-I
2
C bridge. Using a USB2 interface, the bridge allows
users to connect the module to a PC and exercise the I
2
C interface with each PTN3944
on the AIC. A GUI monitors and/or configures the settings for each PTN3944.
UM11596
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
User manual
Rev. 1 — 14 July 2021
24 / 37
