MSM9225B User’s Manual
Chapter 2 Register Descriptions
2 – 23
2.4.5 CAN Bus Timing Register 1 (BTR1: 2Ehex)
This register sets the sampling point used for bus timing.
Writing to the BTR1 bit is enabled, when the INIT bit of the CAN control register (CANC: 0Ehex) is “1”.
The bit configuration is as follows:
MSB
Not
used
TSEG22 TSEG21 TSEG20 TSEG13 TSEG12 TSEG11 TSEG10
LSB
BTR1 (2Ehex), R/W: R/W
Initial
value:
0
0
0
0
0
0
0
0
TSEG13 TSEG12 TSEG11 TSEG10
TSEG1
0
0
0
0
1
×
BTL cycle
0
0
0
1
2
×
BTL cycle
•
•
•
•
•
•
•
•
•
•
1
1
1
0
15
×
BTL cycle
1
1
1
1
16
×
BTL cycle
TSEG22 TSEG21 TSEG20
TSEG2
0
0
0
1
×
BTL cycle
0
0
1
2
×
BTL cycle
•
•
•
•
•
•
•
•
1
1
0
7
×
BTL cycle
1
1
1
8
×
BTL cycle
Unused bit.
Write a “0”.
Figure 2-23 CAN Bus Timing Register 1 (BTR1)
(1) Time segment 1: TSEG13 to TSEG10
This is a 4-bit field to set the sampling point.
Table 2-7 shows the relationship between bit content and TSEG1.
At reset, TSEG13 to TSEG10 are set to “0000”.
Table 2-7 TSEG1 Setting
TSEG13
TSEG12
TSEG11
TSEG10
TSEG1
0
0
0
0
1
×
BTL cycle
0
0
0
1
2
×
BTL cycle
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
1
1
1
0
15
×
BTL cycle
1
1
1
1
16
×
BTL cycle
(2) Time segment 2: TSEG22 to TSEG20
This is a 3-bit field to set TSEG2.
Table 2-8 shows the relationship between the bit content and TSEG2.
At reset, TSEG22 to TSEG20 are set to “000”.
Summary of Contents for MSM9225B
Page 7: ...Chapter 1 Overview...
Page 13: ...Chapter 2 Register Descriptions...
Page 53: ...Chapter 3 Operational Description...
Page 62: ...Chapter 4 Microcontroller Interface...
Page 71: ...Chapter 5 Electrical Characteristics...
Page 81: ...Appendixes...
