Oki TF-300P Field Service Manual Download

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6-1

6. CIRCUIT DESCRIPTION

6.1 Main Board Circuit

The mother board version is the first version that begins mass-production and the circuit diagrams
consists of 11 schematics which are described in the following sections.

6.1.1 Block Diagram

The extended FAXENGINE chip set consists of an Integrated Fax Controller FC200(-M) and a
modem chip (R96DFXL). The FC200(-M) performs all common facsimile machine control, monitor
and interface function. Additionally, it contains scanner, printer, keyboard, stepping motor and
modem interfaces. These programmable functions and interfaces support a wide range of
peripherals. Integrated 8 bit pipeline ADC, clamp, sample hold and AGC allow minimum external
scanner interface hardware. Built-in DLC and shading correction combined with two-dimensional
Error Diffusion and two-dimensional edge enhancement provides state-of-the-art image processing
performance in half-tone modes. The R96DFXL modem can execute modem can excu 9600bps
fax transmission and reception.

6.1.2 Integrated Fax Controller

The Advanced extended FAXENGINE Integrated Fax Controller (FC200-M) includes following
features.

1) Microprocessor.

The embedded processor MC24

in FC200(-M) provides 16-Mbyte memory addressing

capability over 24-bit address/8-bit data bus and dedicated control lines.

2) Printer Interface Control.

The FC200(-M) supplies programmable strobe and control signals that interface with most, if not
all, thermal printers. In addition to Standard (non-Split) printing mode, latchless Split-printing
mode and latchless two-clock mode can be supported. The three signals PDAT, PCLK, and PLAT
control the transfer of data to the printer.

3) Scanner Control.

Four programmable control and timing signals supports CIS scanner interface. An internal 8-bit
A/D converter is provided. Video processing supports DLC and two modes of shading correction
for scanner data non-uniformity’s arising from uneven sensor output or uneven illumination.
Correction may be provided to an 8-pixel group at a time or, separately to each pixel. Less than 1
K of RAM is required to support shading correction. A Digital Adaptive Halftone image processing
is supported. A 2-Dimensional error diffusion algorithm as well as a 2-D Edge Enhancement
control are performed in the hardware. Dynamic background and contrast control is provided for
text images. Multi-level horizontal B4 to A4 reduction is also provided for the scanner data.

4) Motor Control.

Eight outputs are provided to external current drivers; four for scanner motor.

5) Image Coding Schemes.

FC200 (-M) provides MMR data compression and decompression conformed with ITU-T
recommendation T.4.

6) Real Time Clock (RTC).

FC200 (-M) includes a battery backed-up real time clock. The life of the RTC is 32 years, and leap
year compensation is automatic.

7) External Memory Support.

External ROM stores the program object code. External RAM is used by processor for shading
correction and line buffer. DRAM controller supports refresh during battery operation. DRAM
stores image and voice data.