2-2 Connections & Pinouts
887293
DaqBoard/500 Series User’s Manual
68-Pin SCSI Type III Pinout
Standard 68-Pin SCSCI Type III, Socket (Female) Connector with Orb
Pin
Signal
Description / Comments
Pin
Signal
Description / Comments
1 DACLKIN/
CNTR1
See Pin 39
[Note
4]
External DAC Clock In or
Counter 1. Rising or Falling
Edge Sensitive.
35
DGND
Digital Ground
2 ADCLKIN
See Pin 5
[Note 3]
External ADC Clock In
36
DGND
Digital Ground
3 ADTRGOUT/
TMR0
Internal ADC Trigger Output/
Timer 0 Clock Output
37 ADCLKOUT/
TMR1
Internal ADC Clock Output/
Timer 1 Clock Output
4
--
Reserved
38
DATRGIN
DAC0 External Gate
(Level Controlled), or
External Trigger (Edge Active).
5 ADCLKIN
See Pin 2
[Note 3]
External ADC Clock In
39
DACLKIN/
CNTR1
See Pin 1
[Note 4]
External DAC Clock In, or
Counter 1. Rising or Falling
Edge Sensitive.
6 ADTRGIN
ADC
Trigger
40
DGND
Digital Ground
7
C6
TTL Level Digital I/O Ch. C6
41
C7
TTL Level Digital I/O Ch. C7
8
C4
D
TTL Level Digital I/O Ch. C4
42
C5
TTL Level Digital I/O Ch. C5
D
9
C2
I
TTL Level Digital I/O Ch. C2
43
C3
TTL Level Digital I/O Ch. C3
I
10
C0
G
TTL Level Digital I/O Ch. C0
44
C1
TTL Level Digital I/O Ch. C1
G
11
B6
I
TTL Level Digital I/O Ch. B6
45
B7
TTL Level Digital I/O Ch. B7
I
12
B4
T
TTL Level Digital I/O Ch. B4
46
B5
TTL Level Digital I/O Ch. B5
T
13
B2
A
TTL Level Digital I/O Ch. B2
47
B3
TTL Level Digital I/O Ch. B3
A
14
B0
L
TTL Level Digital I/O Ch. B0
48
B1
TTL Level Digital I/O Ch. B1
L
15
A6
TTL Level Digital I/O Ch. A6
49
A7
TTL Level Digital I/O Ch. A7
16
A4
I
TTL Level Digital I/O Ch. A4
50
A5
TTL Level Digital I/O Ch. A5
I
17
A2
O
TTL Level Digital I/O Ch. A2
51
A3
TTL Level Digital I/O Ch. A3
O
18
A0
TTL Level Digital I/O Ch. A0
52
A1
TTL Level Digital I/O Ch. A1
19
+5 VDC
Power
53
DGND
Digital Ground
20
ARET 1
[Note 2]
Analog Return 1
54
ARET 0
[Note 2]
Analog Return 0
21
AOUT 1
[Note 2]
DAC1
, Analog Out 1
55
AGND
Analog Ground
22
AOUT 0
[Note 2]
DAC0
, Analog Out 0
56
AGND
Analog Ground
ANALOG INPUTS
For Single Ended
For Differential
ANALOG INPUTS
For Single Ended
For Differential
23
AIN 15
Ch. 15
Ch. 7 Lo (-)
57
AIN 7
Ch. 7
Ch. 3 Lo (-)
24
AGND
Analog Ground
Analog Ground
58
AIN 14
Ch. 14
Ch. 7 Hi (+)
25
AIN 6
Ch. 6
Ch. 3 Hi (+)
59
AGND
Analog Ground
Analog Ground
26
AIN 13
Ch. 13
Ch. 6 Lo (-)
60
AIN 5
Ch. 5
Ch. 2 Lo (-)
27
AGND
Analog Ground
Analog Ground
61
AIN 12
Ch. 12
Ch. 6 Hi (+)
28
AIN 4
Ch. 4
Ch. 2 Hi (+)
62
SGND
Signal Ground
Signal Ground
29
AGND
Analog Ground
Analog Ground
63
AIN 11
Ch. 11
Ch. 5 Lo (-)
30
AIN 3
Ch. 3
Ch. 1 Lo (-)
64
AGND
Analog Ground
Analog Ground
31
AIN 10
Ch. 10
Ch. 5 Hi (+)
65
AIN 2
Ch. 2
Ch. 1 Hi (+)
32
AGND
Analog Ground
Analog Ground
66
AIN 9
Ch. 9
Ch. 4 Lo (-)
33
AIN 1
Ch. 1
Ch. 0 Lo (-)
67
AGND
Analog Ground
Analog Ground
34
AIN 8
Ch. 8
Ch. 4 Hi (+)
68
AIN 0
Ch. 0
Ch. 0 Hi (+)
Notes to this table appear on the following page.