ON Semiconductor NCP45491PMNGEVB, User Manual

NCP45491PMNGEVB

www.onsemi.com

3

Testing Procedure

The NCP45491PMNGEVB comes fully assembled and

tested. Follow the steps below to verify board operation.
Refer to the schematic and layout diagrams found in

Appendix A

 and 

Appendix B

 respectively as needed.

1. Apply power to VBUS inputs 

(12 V, 6 V, and 8 V supply).

2. Apply load currents for all channels.
3. Apply 3.3 V VCC power.
4. Ensure that EN is held at 0 V.
5. Apply MUX_SEL signal. (Square wave 50% duty

cycle, 100 kHz or faster, VCC to 0 V)
a. 12 cycles will read out voltage and current data
for all 6 default channels.
b. Continuous cycles on MUX_SEL will read out
bus voltage and current data continuously,
repeating channels 1

−

6.

6. Observe the following:

a. 1.3 V on BG_REF_OUT
b. 650 mV on CM_REF_IN
c. 170 mV on BS_REF
d. Bus voltages and currents represented on
DIFF_OUTP and DIFF_OUTN with oscilloscope.

PCB Layout

Care must be taken in PCB layout regarding a few specific

nodes for proper operation of the NCP45491. Connections
to the external sense resistor for each channel must be treated
as a 4 wire Kelvin connection. The SH_IN_Nx and the
SH_IN_Px (connected through R1) must connect directly to
the sense resistor leads for each respective channel. These
should also be large traces to avoid error in the shunt current
measurement. See 

Appendix C

 for the example layout of the

evaluation board.