DV-CP802
IC BLOCK DIAGRAM AND TERMINAL DESCRIPTIONS-11
Q1201: CXD1885Q (DVD DSP)-3
No.
Sign
I/O
Classification
Description
1
DVDD33
P
VDD & GND
Digital power supply (3.3V)
2
ALCR
I
MCU I/F
Chip reset input port. L: Reset mode
3
MSEL0
I
MCU I/F
MUCH I/F mode select 0
4
MSEL1
I
MCU I/F
MUCH I/F mode select 1
5
MA0
I/O
MCU I/F
MUCH address input 0 / Data in/ out 0 port
6
MA1
I/O
MCU I/F
MUCH address input 1 / Data in/ out 1 port
7
MA2
I/O
MCU I/F
MUCH address input 2 / Data in/ out 2 port
8
MA3
I/O
MCU I/F
MUCH address input 3 / Data in/ out 3 port
9
MA4
I/O
MCU I/F
MUCH address input 4 / Data in/ out 4 port
10
MA5
I/O
MCU I/F
MUCH address input 5 / Data in/ out 5 port
11
MA6
I/O
MCU I/F
MUCH address input 6 / Data in/ out 6 port
12
MA7
I/O
MCU I/F
MUCH address input 7 / Data in/ out 7 port
13
MA8
I
MCU I/F
MUCH address input 8 / Data in/ out 8 port
14
TESTSEL
I
MCU I/F
Test select input port
15
MD0
I/O
MCU I/F
MUCH data in/ out 0 port. (LBS.)
16
MD1
I/O
MCU I/F
MUCH data in/ out 1 port
17
MD2
I/O
MCU I/F
MUCH data in/ out 2 port
18
MD3
I/O
MCU I/F
MUCH data in/ out 3 port
19
MD4
I/O
MCU I/F
MUCH data in/ out 4 port
20
MD5
I/O
MCU I/F
MUCH data in/ out 5 port
21
DVSS
P
VDD & GND
Digital GOD
22
MD6
I/O
MCU I/F
MUCH data in/ out 6 port
23
MD7
I/O
MCU I/F
MUCH data in/ out 7 port. (MOB)
24
MALE
I
MCU I/F
MUCH address latch signal input port
25
MCS
I
MCU I/F
MUCH chip select signal input port
26
MWR
I
MCU I/F
MUCH write strobe signal input port
27
DVDD33
P
VDD & GND
Digital power supply (3.3V)
28
MRD
I
MCU I/F
MUCH read strobe signal input port
29
MRDY
O
MCU I/F
MUCH reedy signal output port. L: Wait condition
30
MINT
O
MCU I/F
MUCH interruption output signal port. L: demand state of interruption
31
SYSCK
O
Clock
Clock monitor output port
32
DVDD18
P
VDD & GND
Digital power supply (1.8V), for internal logic circuit
33
XI
I
Clock
Crystal oscillator connection port
34
XO
O
Clock
Crystal oscillator connection port
35
DVSS
P
VDD & GND
Digital GOD
36
VDT7
O
VSTEM A/V
MPEG data output 7 port
37
VDT6
O
VSTEM A/V
MPEG data output 6 port
38
DVSS
P
VDD & GND
Digital GOD
39
VDT5
O
VSTEM A/V
MPEG data output 5 port
40
VDT4
O
VSTEM A/V
MPEG data output 4 port
41
VDT3
O
VSTEM A/V
MPEG data output 3 port
O
VSTEM A/V
MPEG data output 2 port
O
VSTEM A/V
MPEG data output 1 port
O
VSTEM A/V
MPEG data output 0 port
I
VSTEM A/V
MPEG data request input port
O
VSTEM A/V
Data valid output port
O
VSTEM A/V
BECK error select (Flag) output port. L: Error selector
O
VSTEM A/V
DVD first sector flag signal output port
O
VSTEM A/V
Data strobe signal output port
O
VSTEM Command
Interrupt request output port. (for host )
I
VSTEM Command
Drive H/W reset input port. L: reset
P
VDD & I/F
Digital power supply (1.8V), for internal logic circuit
P
VDD & I/F
Digital power supply (3.3V), for I/O
O
VSTEM Command
Serial data output port (for host)
55
DRVRX
I
VSTEM Command
Serial data input port (from host)
56
DRVCLK
I
VSTEM Command
Clock signal input port
57
DRVRDY
O
VSTEM Command
Drive ready signal output port. L: ready condition
58
C2PO
O
Audio I/F
CD-DSL C2 pointer output port
59
DADT
O
Audio I/F
Audio serial data output port
60
DOTX
O
Audio I/F
Digital audio output port
61
LRCK
O
Audio I/F
L/R clock output port
62
BCK
O
Audio I/F
Audio-bit clock output port
63
EXVCO
I
TEST/ Monitor
External channel clock input port
64
EXPLDT
I
TEST/ Monitor
External FRO data input port
65
CSL
O
ASP I/F
FRO signal processing port. Latch signal output control
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