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6. Header of Acquisition Frame

Acquisition header has 54 bytes, described in details with the following table:

Byte No Name

Register
address

Value
range

Description

1

Start of Frame

---

'@' (0x40)

Beginning character of frame/header ASCII „@”

2

FrameIdx

0x06

[7:0]

Actual   value   of   frame   counter   –   16-bit   counter   with
automatic reset at overflow

3

[15:8]

4

TimeStamp

0x18

[7:0]

Register TimeStamp – value of TIMER register captured
on trigger event

5

[15:8]

6

TriggerOverrun

0x12

[7:0]

Register TriggerOverrun – amount of lost triggers since
last acquisition (16-bit counter)

7

[15:8]

8

TriggerOverrunSource

0x0A

[3:0]

Flags of lost triggers sources since last acquisition

9

GPI Captured

[5:0]

State of GPI[5:0] captured on trigger event

10

Encoder 1 Position 

0x6E

[7:0]

Encoder 1 position captured on trigger event

11

 

[15:8]

12

0x70

[23:16]

13

 

[31:24]

14

Encoder 2 Position 

0x7A

[7:0]

Encoder 2 position captured on trigger event

15

[15:8]

16

0x7C

[23:16]

17

 

[31:24]

18

Peak Detectors Status

0x2A

[7:0]

PeakDetectors control/status register

19

(0x00)

- reserved

20

PDA RefPos 

0x36

[7:0]

PDA gate – reference level crossing position

21

[15:8]

 - useful bits [17:0]

22

0x38

[23:16]

23

(0x00)

- reserved

24

PDA MaxVal

0x3A

[7:0]

PDA gate – maximum value of signal in the gate

25

(0x00)

- reserved

26

PDA MaxPos

0x3C

[7:0]

PDA gate – position of maximum value

27

[15:8]

 - useful bits [17:0]

28

0x3E

[23:16]

29

(0x00)

- reserved

30

PDB RefPos 

0x4A

[7:0]

PDB gate – reference level crossing position

31

[15:8]

 - useful bits [17:0]

32

0x4C

[23:16]

33

(0x00)

- reserved

34

PDB MaxVal

0x4E

[7:0]

PDB gate – maximum value of signal in the gate

35

(0x00)

- reserved

36

PDB MaxPos

0x50

[7:0]

PDB gate – position of maximum value

37

[15:8]

 - useful [17:0]

38

0x52

[17:16]

39

(0x00)

- reserved

40

PDC RefPos 

0x5E

[7:0]

PDC gate – reference level crossing position

41

[15:8]

 - useful bits [17:0]

42

0x60

[17:16]

43

(0x00)

- reserved

44

PDC MaxVal

0x62

[7:0]

PDC gate – maximum value of signal in the gate

45

(0x00)

 - reserved

46

PDC MaxPos

0x64

[7:0]

PDC gate – position of maximum value

47

[15:8]

 - useful bits [17:0]

48

0x66

[17:16]

49

(0x00)

- reserved

50

DataCount 

0x24

[7:0]

Amount of measurement data (parameter DEPTH)

51

[15:8]

 - useful bits [17:0]

52

0x26

[17:16]

53

(0x00)

- reserved

54

End of Header

---

'/' (0x2F)

Header end character – ASCII „/”

55

Sample 1

[7:0]

First measurement sample

56

Sample 2

[7:0]

Second measurement sample

[...]

54+
(Cnt-1)

Sample [DataCount-1]

[7:0]

54+Cnt

Sample [DataCount]

[7:0]

Last measurement sample

Summary of Contents for OPBOX-2.1

Page 1: ...48 071 329 68 54 fax 48 071 329 68 52 e mail optel optel pl http www optel pl Wroc aw OPBOX ver 2 1 Miniature ultrasonic data acquisition system with integrated pulser receiver Description and manual...

Page 2: ...Packet 7 5 7 Acquisition in real time 7 6 Header of Acquisition Frame 9 7 Configuration and maintenance of acquisition in real time 10 8 Comments to the acquisition settings 12 8 1 Calculating maxima...

Page 3: ...A D converter Resolution 10 bit 8 bits are stored Maximum input voltage 0 5V Sampling frequency switchable MHz 100 50 33 3 25 20 16 7 14 3 12 5 11 1 10 9 1 8 3 7 7 7 14 i 6 67 Data buffer 1 262090 25...

Page 4: ...igital input GPI5 or IDX input for encoder module ENC2 9 GPO 1 TTL 5V Digital output GPO1 10 GPO 3 TTL 5V Digital output GPO3 11 GPI 0 TTL LVTTL Digital input GPI0 or trigger input EXT_X or CHA input...

Page 5: ...POS_L 0x50 10 TRG_OVERRUN 0x12 42 PDB_MAX_POS_H 0x52 11 XY_DIVIDER 0x14 43 PDC_START_L 0x54 12 TIMER 0x16 44 PDC_START_H 0x56 13 TIMER_CAPT 0x18 45 PDC_STOP_L 0x58 14 ANALOG_CTRL 0x1A 46 PDC_STOP_H 0x...

Page 6: ...o another computer and checked again During data acquisition the device automatically block the measurement command if any of status flags signals a failure In the case if the voltage of USB power sup...

Page 7: ...Disabled switched on with bit 9 storeDisable in register MEASURE causes that data from ADC converter are not stored to the memory of the device Only acquisition header is stored This mode can be used...

Page 8: ...ion Data Header Acquisition Data HEADER_SIZE 54 bytes DEPTH 1 262090 bytes Frame FRAME_SIZE HEADER_SIZE DEPTH Packet PACKET_LENGTH 3 Frames Figure 5 2 Data organization in Header and Packets in StoreD...

Page 9: ...crossing position 21 15 8 useful bits 17 0 22 0x38 23 16 23 0x00 reserved 24 PDA MaxVal 0x3A 7 0 PDA gate maximum value of signal in the gate 25 0x00 reserved 26 PDA MaxPos 0x3C 7 0 PDA gate position...

Page 10: ...ACKET_LENGTH trying to read data before will cause failure reading error timeout the time needed to fulfill all acquisitions depends mostly on a chosen trigger source and the size of Measurement Windo...

Page 11: ...ning in the buffer of the device N should be written to the register PACKET_LEN Only in this situation the change of PACKET_LEN register to the smaller one do not reset the frame buffer in the device...

Page 12: ...large throughput of measurement data from the device to the PC one should try to increase the length of the packet that allows to diminish the amount of calls of data check function PACKET_READY and...

Page 13: ...s the setting of PACKET_LEN to PACKET_LEN_MAX maximal possible with new DEPTH setting 8 3 2 Changing of the length of acquisition packet PACKET_LEN Changing the length of acquisition packet similar as...

Page 14: ...eader the amount of lost triggers since the start of previous acquisition and the reason for this event CAPT_REG register Each of flag TrgOvrScr_A TrgOvrScr_H TrgOvrScr_F and TrgOvrScr_P in CAPT_REG r...

Page 15: ...one During transmission of the TGC curves table to the device it is necessary to block the triggering of acquisitions It is recommended to use for this purpose the zeroing of bit 4 Trigger Enable in...

Page 16: ...and writing the position of this sample in the register PDx_REF_POS_L and _H 2 Mode Rising detects rising slope first event occurs when one sample is lower than PDx_REF_VAL and the next sample is high...

Page 17: ...4 Connect the encoder power supply external 5 Set the configuration bits of the module work mode negation input filter in the ENCx_CTRL register of chosen encoder module 6 Set bit 0 Encoder X Enable...

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