3DQDVRQLF
35
Chapter
3
EURO 4H Supplement
2.9.3. Deflection Processing
The deflection processing stage of the DDP IC1504
is used to generate the signals for the horizontal and
vertical drive.
Here
the horizontal
and vertical
timings
are
synchronised by
the incoming synchronisation
signals, from which the east / west and vertical output
signals are produced. The resultant east / west signal
is then output from pin 21, while the vertical output is
fed from pins 19 and 20 of IC1504.
The horizontal drive pulse output from pin 8 of IC1504
is monitored by a security unit which with the aid of the
external 5MHz crystal X1502 connected between
pins 65 and 66 produces a reference clock signal
which controls the Horizontial drive on and off time.
During the power on stage and before the horizontal
drive signal can be estabilished the security unit also
generates a free running Horizontal drive signal
divided down from the 5MHz reference clock.
The horizontal drive signal output via pin 8 of IC1504
is then fed to connector F1 pin 16 where the drive
signal is then fed to the E-Board and the horizontal
output stage.
2.9.4. Protection Circuitry
As well as all the functions just mentioned picture tube
and drive stage protection is also provided.
This is achieved through the following measures.
1.
Vertical protection safety input pin 11: This
vertical protection input is used to prevent the
picture tube from damage in the event of a
malfunction of the vertical deflection stage. If the
peak-to-peak sawtooth signal is to small the
RGB output signals are blanked.
2.9.5. Control
In addition to these signals mentioned above, the
DDP also requires the following:
:
Reset In pin 39 is used during the switch ON
period, to hold the DDP in a stable condition until
the supply voltages have become established.
:
LLC2 pin 53 provides a 27MHz clock signal
which is used as the system clock for support of
the 100Hz system.
:
LLC1 pin 62 provides a 13.5MHz clock signal
which is used as the system clock by the control
processing stage.
:
SDA serial data line pin 67
:
SCL serial clock line pin 68
2.10. F-Board Supply Voltages
To allow the IC’s on the F-Board to perform the
processing that has just been discribed a number of
supply voltages are required, these are:
:
A 12V supply fed via connector F1 pin 18 and
used to supply the perphial circuits.
:
The 5V supply fed to the F-Board via connector
F1 pin 20 is used to supply periphal circuits of the
F-Board, as well as the processing ICs.
:
In addition to the 5V supply required by the
processing ICs of the F-Board, a 3.3V supply is
also required by IC1502 and IC1503. This 3.3V
supply is fed from the E-Board and IC855 which
is fed a 5V supply input via pin 1. Output from pin
3 of IC855 is a stabilised 3.3V supply which is fed
to connector E70 pin 19 on the E-Board and to
connector F1 of the F-Board.
Summary of Contents for EURO 4 Chassis
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