Video Process Block Diagram
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The main function of the A board is to select and process one of the incoming video signals. Video inputs 1 and 2,
Component Video Inputs 1 and 2 and the composite video output of the tuner are all are connected to IC3001 for
selection. The video output signal of the switch can be in any of the three formats: Video, Y/C, or Y, Pb, Pr. The
selected output enters IC4510, the HDMI IF Receiver/Decoder IC, for A/D conversion.
The comb filter inside IC4510 converts the composite video signal of the main picture to Y and C (luminance and
chrominance) signals. S-Video, which is already Y/C separated, simply passes through the comb filter. The
chrominance data is then applied to the Chroma Demodulator circuit to separate the color signal into Pb and Pr data.
At the completion of this process, the format of the composite or S-Video signal is now the same as a digital 480i
component signal. If the incoming video is in the 480p, 720P, or 1080i format, the Y, Pb, and Pr signals undergo A/D
(analog to digital) conversion only. The 10 bit YUV data is provided to a video switch.
The HDMI receiver section of IC4510 converts the incoming HDMI signals to a YUV video signal. The Video interface
circuit selects between the two HDMI sources and outputs the YUV signal to the switch. The output of the switch is
provided to another switch located inside the PEAKS LITE IC, IC8001.
Digital television reception of the tuner is output in the form of an IF (Intermediate Frequency) signal
IC8302 contains a detector circuit that retrieves the Transport stream from the IF signal. The transport stream then
enters the DTV I/F (Interface) section of IC8001 where the video signal is extracted and converted to YUV data. The
output is provided to the Video Input I/F for selection. The JPEG data of the SD card enters the JPEG I/F section of
IC8001 for conversion into YUV data and output to the Video Input I/F circuit. The video input interface outputs the
selected picture data to the video process circuit.
This Video Process section of the IC performs all picture control operations such as brightness, contrast, color, tint,
etc. On Screen Display data such as channel numbers, Digital TV closed caption, and picture adjustments are mixed
with the video data. The output signal is then applied to the LVDS (Low Voltage Differential Signaling) transmitter for
conversion into serial data. The LVDS transmitter transfers the video information from the A board to the D board. It
distributes signals with low-jitter, while creating little noise. It reduces power consumption and the generated noise
from data transmission. Another benefit of the LVDS standard is minimal concern for cable length.
The main MCU handles all video applications. It serves as the controller that monitors all operations of the TV section
(not display) of the unit.
When watching digital television or viewing pictures from an SD card, the digital YUV output of the Video Input
Interface is converted into analog composite video signal for output at the monitor out jack.
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Summary of Contents for Generation Plasma Display Television
Page 5: ...2007 Panasonic Plasma Line up 5 ...
Page 6: ...Models Comparison 6 ...
Page 7: ...Models Comparison 7 ...
Page 8: ...Models Comparison 8 ...
Page 10: ...10 ...
Page 11: ...10th Generation Plasma Television 11 Board Layout ...
Page 12: ...12 ...
Page 14: ...TH 42PX75U Board Layout Pictorial 14 ...
Page 16: ...Overall Block Diagram 16 ...
Page 18: ...18 ...
Page 19: ...10th Generation Plasma Television 19 Power Supply ...
Page 20: ...20 ...
Page 21: ...Standby Circuit 21 ...
Page 23: ...Standby Circuit 23 ...
Page 28: ...Main CPU VCC Supply A Board 28 ...
Page 30: ...TV_SUB_ON TUNER_SUB_ON 30 ...
Page 32: ...TV_SUB_ON F_STB_ON 32 P P Board ...
Page 34: ...TV_SUB_ON Relay Drive Circuit 34 ...
Page 37: ...ACFB Active Clamp Full Bridge Switching Circuit 37 ...
Page 39: ...MAIN SUB Voltages 39 ...
Page 41: ...F 15V DTV9V SUB5V SOS Detect Circuit 41 ...
Page 43: ...Power On Operation 43 ...
Page 45: ...Power On 1 45 L H ...
Page 48: ...48 Power On 3 ...
Page 51: ...P15V P5V Circuit 51 ...
Page 53: ...Vsus Vda Circuit 53 ...
Page 57: ...10th Generation Plasma Television 57 Shutdown Circuits ...
Page 58: ...58 ...
Page 59: ...SOS Circuit Overview 59 ...
Page 63: ...DRV_RST SOS 63 ...
Page 65: ...Location of Q9302 65 ...
Page 66: ...Close up View of Q9302 66 ...
Page 67: ...5 Blinks SOS 1 67 ...
Page 69: ...SOS Drive reset 69 ...
Page 71: ...12 Blinks SOS 71 ...
Page 73: ...10th Generation Plasma Television 73 Signal Processing ...
Page 74: ...74 ...
Page 75: ...Signal Circuit Overview 75 ...
Page 77: ...Video Process Block Diagram 77 77 ...
Page 79: ...D Board Block Diagram 79 ...
Page 83: ...Audio Process Block Diagram 83 83 ...
Page 85: ...85 ...
Page 86: ...10th Generation Plasma Television 86 Adjustments ...
Page 87: ...87 ...
Page 90: ...Self Check Menu 90 ...
Page 91: ...Check point 91 ...
Page 94: ...Adjustment Sub Menu 94 ...