252
6.2.5.
CCD Drive Clock Generator Circuit
This circuit is also contained in IC9. Its function is to generate FSG, FCK1 and FR clock signals, which are required for driving the
CCD. These clock signals are generated by the system clock generator circuit derived from the 25.0 MHz clock signal that is input
to IC160. Its timing chart is shown below.The FSG, FCK1, FCK2, FR and FSH clock supplied to the CCD is output from the OFSG,
OFCK1, OFCK2, FR and FSH of IC40 (DZZAC000108). These clocks of IC40 are derived from the FSG, FCK1, and FR clock of
IC160 (MN86075) generates the timing of the FSG, FCK1, FCK2, FR and FSH clock to drive the CCD.
FSG
FCK1
FCK2
FR
FSH
TG
FSG
OFSG
OFR1
OFR2
FR1
FCK1
FCK2
FR
FSH
FSG
CK1
CCD
uPD3734ACY
CCD
Drive
Circuit
IC160
MN86075
IC140
DZZAC000168
CK2
RB
SHB
Summary of Contents for Panafax DX-2000
Page 2: ......
Page 27: ...27 9 1 Screw 19 10 Release two Latch Hooks 11 Remove the SNS Assembly 121 9 10 11 ...
Page 49: ...49 2 15 Screw Identification Template ...
Page 57: ...57 3 7 3 Option Cassette Circuit 555 748 728 744 928 953 730 731 731 952 944 930 931 931 ...
Page 58: ...58 3 7 4 LAN Control Circuit 522 CN50 1102 1104 1101 N C N C RD N C N C RD TD TD ...
Page 59: ...59 3 7 5 Page Description Language Printer Interface Kit ...