42
10.2. AUDIO BLOCK DIAGRAM
SA
-PMX
7
0EG
A
UDIO BLOCK DI
A
GR
A
M
: TUNER/
A
UX INPUT
S
IGN
A
L LINE
:
A
UDIO OUTPUT
S
IGN
A
L LINE
: FM
S
IGN
A
L LINE
LCH
RCH
JK8000
2
3
1
4
5
7
6
HE
A
DPHONE
DRI
V
ER
IC4300
13 -INL
2
-INR
1 +INR
14 +INL
OUTL 1
2
OUTR 3
/MUTE 5
HE
A
DPHONE
M
A
IN P.C.B.
HP_MUTE
HP_DET
TU_
S
D
A
TU_INT
FM
A
NT
JK51
FM R
A
DIO
RECEI
V
ER
IC5
2
2
FMI
I
2S
_
S
DO0
I
2S
_LRCK
I
2S
_BCK
S
CLK
7
GPIO
2
18
DOUT 13
S
DIO 8
R
S
T 5
DF
S
14
DCLK 1
7
FROM/TO
S
ER
V
O &
SYS
TEM CONTROL
FROM/TO
S
ER
V
O &
SYS
TEM CONTROL
5
P9
2
00
5
CN4300
LCH
3
P9
2
00
3
CN4300
RCH
1
P9
2
00
1
CN4300
6
P8000
6
CN9
2
0
2
LCH
4
P8000
4
CN9
2
0
2
RCH
2
P8000
2
CN9
2
0
2
HP_DET
HP_DET
7
CN8008
6
CN51
TUN_D
A
T
A
TUN_D
A
T
A
5
CN8008
8
CN51
TUN_LRCK
TUN_LRCK
6
CN8008
7
CN51
TUN_BCK
TUN_BCK
1
2
CN8008
1
CN51
RE
S
ET
RE
S
ET
11
CN8008
2
CN51
S
CLK
S
CLK
LIN 15
RIN 1
6
1
CN8008
1
2
CN51
A
UX_RCH
A
UX_RCH
3
CN8008
10
CN51
A
UX_LCH
A
UX_LCH
10
CN8008
3
CN51
S
DIO
S
DIO
4
CN8008
9
CN51
INT
INT
TUNER P.C.B.
DIGIT
A
L
A
MPLIFIER
LEFT
RIGHT
S
PE
A
KER
S
HE
A
DPHONE P.C.B.
P
A
NEL P.C.B.
IC4
2
00
DIGIT
A
L
A
UDIO
PWM PROCE
SS
OR
IC4100
JK
2
000
I
2S
_
S
EL_1
TU_R
S
T
TU_
S
CL
1
Y
4
2
1
A
2Y 7
5
2A
6 2
B
3
Y
9
11 3
A
10 3B
1
S
ELECT
3 1B
MULTIPLEXOR
IC4
2
01
DC_DET_D
A
MP
Q4
2
00,Q4
2
01
Q4
2
0
2
,Q4
2
03
D4
2
00
D8000
DC DETECT
CIRCUIT
+
-
1
7
R
S
T_CD
1
6
PWM_C
18 PWM_D
7
R
S
T_
A
B
2
OTW
5
S
D
6
PWM_
A
8 PWM_B
OUT_
A
B
S
T_
A
OUT_B
B
S
T_B
3
CN4
2
00
4
CN4
2
00
39
43
3
6
34
+
-
OUT_D
B
S
T_D
OUT_C
B
S
T_C
1
CN4
2
00
2
CN4
2
00
2
8
2
4
31
33
+
2
4
V
S
DIN1
8
BCK
10
LRCK
9
S
D
A
4
S
CL
5
R
S
T_N
2
S
MUTE
3
PWM1
A 2
8
VA
LID
2
4
PWM1B
27
PWM
2
B
2
9
PWM
2A
30
X4100
XI 41
XO 4
2
D
S
P_
S
D
A
D
S
P_RE
S
ET
D
S
P_
S
CL
D
S
P_MUTE
ERR_IN
1
6
D
S
P_ERR
D
A
MP_MUTE
D
A
MP_
VA
LID
D
A
MP_OTW
D
A
MP_
S
D
RCH
LCH
A
UX IN
(EXT-IN)
2
1
3
4
OP
A
MP
IC
2
000
3
A
+IN
5 B+IN
B_OUT
A
_OUT 1
7