18
3.13. A-Board (13/13) Schematic Diagram
(FIN)
SHIELD
TUNER
S
S
S
Thermal
Pad
C5718
10u
10V
C5717
10u
10V
C6757
50V 100p
C6759
50V
180p
C6774
16V
0.1u
C6767
50V
1000p
C6750
50V 470p
C6773
50V
1000p
C6766
50V
1000p
C6758
50V
180p
C6768
50V
1000p
C6764
16V
0.1u
C6751
50V 470p
C6752
50V
100p
C6724
50V
100p
C6737
100p 50V
C6707
16V
0.1u
C6754
50V
5p
C6736
100p 50V
C6777
6.3V
1u
C6710
16V
0.1u
C6720
50V
22p
C6708
10V
10u
C6775
16V 0.1u
C6723
50V
100p
C6704
10V
10u
C6753
50V
5p
C6721
50V
22p
C6746
16V
0.1u
C6722
16V
0.1u
C6770
0.01u
25V
C6769
0.01u
25V
D6750
J0ZZB0000175
C0DBEYY00102
IC5704
2
VOUT
1
GND
3 VIN
4
VOUT
JK6750
K1ZZ00001549
L6705
J0JYC0000464
L6761
J0JYC0000464
L6762
J0JYC0000464
L6774
G1CR27JA0097
L6777
G1CR22JA0097
L6778
G1CR22JA0097
L6763
G1CR27JA0097
L6776
G1CR27JA0097
L6765
G1C82NJ00010
L6773
G1CR27JA0097
L6772
G1CR27JA0097
SUB3.3V
EU_TU_1.8V
SUB3.3V
EU_TU_1.8V
VJ6707
VJ6708
VJ6712
TP6701
TP6700
TP5704
SITU_SCL
FE_XRST_T
FEAINP2_T
SITU_IFAGC1
SITU_IFAGC2
SITU_RST
FEAINN2_T
SITU_ALIF_N
AGC2_T
SITU_ALIF_P
SITU_ALIF_N
SITU_ALIF_P
SITU_RST
SITU_SCL
AGC2_T
FE_XRST_T
FEAINP2_T
SITU_IFAGC2
FEAINN2_T
SITU_1.8V
P_FEAINN
P_XIRQ6
SITU_3.3V
P_AGCI
SITU_SDA
SITU_3.3V
DMD_SDA0_T
DMD_SCL0_T
SITU_3.3V
SITU_1.8V
SITU_SDA
P_FEAINP
R6751
10k
R6716
D0GAR00J0005
R6730
680
R6757
100
R6750
100
R5731
120
R6759
1k
R6734
10k
R5732
56
R6760
3.3k
R6731
680
R6753
100
R6758
100
R6752
0
X6750
H0J240500067
C6760
1000p
50V
C6762
50V
1000p
C6719
50V
1000p
D6751
B0ZBZ0000203
C1AB00004053
IC6750
25
RF_SHLD
26
ADDR
27
RSTB
28
AGC1
1
GPIO1
2
GPIO2
3
AGC2
4
SCL
5
SDA
6
VDD_IO
7
GND
8
VDD_D
9
DLIF_N
10
VDD_H
11
DLIF_P
12
ALIF_N
13
ALIF_P
14
VDD_L
15
LDO_ADJ
16
XOUT
17
XTAL_I
18
XTAL_O
19
GND
20
VDD_H
21
VDD_H
22
RF_REF
23
RF_IP
24
RF_IN
GND
ONBOARD
POWER
MAIN_TUNER
NIM-FE
EU_TU_1.8V
ONBOARD TUNER
RF_IN
24MHz
RESET
Si_1.8V
ASCOT2.5V/SUB3.3V
LNA5V/SiLab1.8V
I2C_SCL
AGC2
I2C_SDA
IF2_N
Si_3.3V
IF2_P
IF2(ALIF)
FE_XRST
BS0
Peaks
RESET
Peaks
Peaks
FOR ON BOARD
FOR ON BOARD
114
117
109
113
112
116
111
110
115
!
A-BOARD (13/13)