Circuit Descriptions
EN 23
TPM5.2E LA
7.
2010-Jun-25
7.1.2
SSB Cell Layout
Figure 7-2 SSB layout cells (top view)
1
88
40_206_100406.ep
s
10042
8
AUDIO CLA
SS
- D
DC/DC
TUNER
ANALOG I/O
S
ERVICE
CONNECTOR
MT5
3
6
3
DIGITAL I/O
COMMON INTERFACE
ANALOG I/O
DIGITAL I/O