1-12-16
4
NU
6
RX(-)
3
RX(+)
5
NU
2
TX(-)
1
TX(+)
7
NU
CN6501
8
GND
H1
G5
G2
33
R6517
J4
IC6001(9/9)
*1
MN2WS0062AFF-B
1K
R6670
H5
G4
J3
H2
F1
K2
H4
F4
1K
R6671
J1
J2
R6512
33
G3
G1
J5
K1
H3
F3
F2
4.7K
R6501
1K
R6502
4.7K
R6674
4.7K
R6503
P-ON+3.3V
R6539
6.49K
100P
C6504
27M-CLOCK
0.1
C6508
0.1
C6503
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
30
27
28
29
31
32
IC6501
KSZ8051MNL
33
R6540
33
R6538
33
R6537
33
R6536
33
R6535
33
R6534
33
R6532
R6513
33
R6526
4.7K
R6529
1K
R6514
33
R6515
33
33
R6524
R6533
1K
1K
R6672
33
R6523
R6531
1K
R6530
1K
33
R6522
1K
R6673
33
R6516
33
R6518
33
R6521
33
R6520
33
R6519
0.1
C6510
2.2
C6511
0.1
C6514
0.1
C6513
BK
BL
BM
BN
BI
BJ
1
2
3
4
(MAIN MICRO CONTROLLER/MPEG2 AV CODEC)
MII-RXCLK
MII-RXD0
MII-RXD1
MII-RXD2
MII-RXD3
MII-RXDV
MII-RXER
MII-TXCLK
MII-TXD0
MII-TXD1
MII-TXD2
MII-TXD3
MII-TXER
MII-TXEN
MII-CRS
MII-COL
MDC
MDIO
MII_INTL
PHYRSTL
WAKEUP
CONTINUE
BD MAIN 8
BD MAIN CBA UNIT
ETHERNET
INTERFACE
(ETHERNET JACK)
CONTINUE
BD MAIN 6
VDD
(+3.3V)
VDD
(+3.3V)
VDD
(+1.2V)
GND
XI
REXT
LED
DRIVER
RECEIVER
TRANSMITTER
PARALLEL/SERIAL
DECODER
SERIAL/PARALLEL
DECODER
MII/RMII/SMII
REGISTERS AND
CONTROLLER
INTERFACE
NU
E5W21SCBD11
BD Main 11 Schematic Diagram
The order of pins shown in this diagram is different from that of actual IC6001.
IC6001 is divided into nine and shown as IC6001 (1/9) ~ IC6001 (9/9) in this BD Main Schematic Diagram Section.
1 NOTE: