Circuit Descriptions, Abbreviation List, and IC Data Sheets
EN 95
LC7.2E LA
9.
9.12 IC Data Sheets
This section shows the internal block diagrams and pin layouts
of ICs that are drawn as "black boxes" in the electrical diagrams
(with the exception of "memory" and "logic" ICs).
9.12.1 Diagram B03B, Type TDA10046AHT(IC7F01), COFDM Channel Decoder
Figure 9-14 Internal block diagram and pin configuration
Block Diagram
Pin Configuration
G_16860_044.eps
300107
SADDR(1:0)
spare inputs
10
SCL
SDA
Fsamp
ΔΣ
SACLK
I2C
Interface
XIN
SCL_TUN
SDA_TUN
AGC_TUN
VIM
DIGITAL FRONT-END
AND OFDM
DEMODULATION
GPIO(3:0)
DSP CORE
SYNCHRONISATION
Frequency, Time, Frame Recovery
FFT Window positioning
TPS decoding
CHANNEL DECODER
VBER
CBER
CPT_UNCOR
MPEG-TS
(parallel)
CHANNEL ESTIMATION
AND CORRECTION
OFDM Spectrum
Confidence
(I,Q)
Carrier
Recovery
VIP
XOUT
Time
Recovery
ACI
Filtering
Digital
AGC
Dynamic
TimeShift
FFT
2K/8K
Coarse
Time
Estimator
Dual AGC
ΔΣ
AGC_IF
ANALOG
Time
Interpolation
Frequency
Interpolation
Partial
Channel
Estimation
CPE
calculation
Channel
Correction
Confidence
Calculation
Outer
Forney
Deinterleaver
Inner
Frequency
Deinterleaver
Bit
Deinterleaver
Descrambler
RS decoder
Demapper
MPEG2
Output
Interface
Viterbi
Decoder
A
D
C
PLL
O
S
C
MPEG-TS
(serial)
ΔΣ
ΔΣ
ΔΣ
ΔΣ
VDD 1.8 V
VDD 3.3 V
VSS 0 V
64
1
16
17
32
33
4
8
SACLK
VSSA_OSC
XOUT
XIN
VDDA18_OSC
DO[7]
49
GPIO[0]
GPIO[1]
ENSERI
AGC_TUN
AGC_IF
SCL_TUN
SDA_TUN
VDDI18
SCL
SDA
CLR#
SADDR[1]
SADDR[0]
TEST
UNCOR
PSYNC
DEN
OCLK
DO[0]
DO[1]
DO[2]
DO[3]
VDDE33
VDDI18
DO[4]
DO[5]
DO[6]
VDD18_PLL_ADC
VSS_PLL_ADC
VDDA18_PLL
VSSA_ADC
VIP
VIM
VDDA33_ADC
VDD33_ADC
GPIO[2]
VDDE33
VDDI18
GPIO[3]
TRST
TMS
TDI
TCK
TDO
S_UNCOR
S_PSYNC
S_DEN
31
3
11
9
7
5
27
25
23
21
19
29
35
3
7
39
41
43
45
51
55
53
57
59
61
S_DO
S_OCLK
TDA10046
TQFP 64
VDDE33
VDDI18
VSS
VSS
VSS
VSS
VSS
VSS
VSS