5-4
5-4
P-SCAN BOARD - CIRCUIT DIAGRAM (PART 1)
VSSQ
VSS
LATCH
REFRESH
COUNTER
BANK0
ROW-
ADDR
LATCH &
DECODER
COLUMN
DEDCODER
BANK0
MEMORY
ARRAY
(4,096x256x16)
SENSE AMPLIFIERS
COMMAND
DECODE
CTRL
LOGIC
MODE REG
ADDRESS REGISTER
ROW
ADDR
MUX
LOGIC
CTRL
NC
VDD
DQM0...3
VDDQ
DATA INPUT REGISTER
DATA OUTPUT REGISTER
READ DATA LATCH
WRITE DRIVERS
I/O GATING
DQM DATA LOGIC
ADDR
COUNTER/
BANK
COLUMN
DC voltage measured in STOP-MODE
F
G
H
I
2100 A14
2101 A5
2102 A12
2103 A14
2104 A13
2105 B6
2106 A5
2107 B14
2108 A6
2109 B5
2110 A7
2111 A6
2112 A6
2113 B8
2114 A5
2115 A5
2116 A6
2117 B8
2118 A5
For MX5900SA/37 only
1
2
3
4
5
67
8
9
10
11
12
13
14
1
2
3
4
5
67
8
9
10
11
12
13
14
A
B
C
D
E
F
G
H
I
A
B
C
D
E
P-scan_LineDoubler
DECOUPLING CAP FOR FLI2301
2119 A6
2120 B8
2121 B8
2122 A8
2123 A8
2124 A8
2125 A8
2126 A9
2127 A9
2128 A9
2129 A9
2130 B12
2131 B12
2132 B12
2133 B13
2134 B10
2135 B10
2136 B10
2137 B9
2138 A9
2139 B9
2140 B13
2141 B13
2142 C13
2143 C13
2144 C13
2145 C12
2146 C12
2147 C13
DECOUPLING CAP FOR FLI2301
2148 B10
2149 B10
2151 C8
2152 B8
2170 I1
3100 B4
3101 B5
3102 B5
3103 C2
DECOUPLING CAP FOR FLI2301
3104 D2
3105 F1
3106 F1
3107 G1
3108 G1
3109 G1
3110 G1
3111 G1
3112 I3
#
3113 I3
3114 I3
3115 I4
3116 I3
3117 I3
3118 I4
3119 I3
3120 I4
3121 I4
3122 I4
3123 I4
3124 I4
3125 I4
3126 I5
3127 I4
3128 I5
3129 I4
DECOUPLING CAP FOR FLI2301
3130 I5
3131 I5
3132 I5
3133 I5
3134 I5
3135 I5
3136 I5
3137 I5
3138 I5
3139 I5
3140 I7
3141 I6
3142 I6
3143 I6
3144 I6
3145 I6
3146 I6
22R
*
*
3147 I7
3148 I6
3149 I6
3150 C7
3158 I7
3159 I7
3160 D11
3161 D11
3162 D11
3163 E11
#
*
I
3170 H1
4100 F2
4101 F2
4103 C8
4105 B4
4110 A13
5100 A13
5101 A13
5102 A13
7100 C3
7101 C12
7103 A12
220n
2142
220n
2132
100n
2120
3149
22R
22R
3109
2105
100n
3115
22R
3144
100n
2113
3106
2118
100n
2102
47u
10K
22R
3141
3119
22R
2121
100n
100n
2124
3160
22R
22R
3127
100n
2125
22R
3123
22R
3135
22R
3122
3129
22R
3105 10K
100n
2134
22R
3133
3159
22R
22R
100n
2152
3158
4103
2151
100n
220n
3104
22R
LD1117
GND
1
IN
3
2
OUT
2146
2129
100n
7103
5102
2130
220n
2103
47u
10u
22R
3117
2133
220n
27R
3102
3126
22R
3100
10R
100n
2116
22R
2135
100n
3137
100n
2148
2140
220n
3136
22R
3124
22R
220n
4100
2137
100n
2141
2138
100n
100n
2126
100n
2127
GND_PS
GNDEARTH
22R
3111
2108
22R
3128
10u
3120
22R
3145
22R
3162
3134
22R
22R
2123
100n
150R
3108 100R
3101
100n
2114
100n
2111
2119
100n
220n
2144
220n
2147
22R
3140
22R
3130
2115
100n
GNDEARTH
3150
4K7
VSS16
194
VSS17
198
17
VSS2
VSS3
31
VSS4
37
49
VSS5
VSS6
63
VSS7
69
VSS8
81
VSS9
89
VSYNC1_PORT1
2
VSYNC2_PORT1
6
VSYNC_PORT2
207
191
XTAL_IN
XTAL_OUT
192
VDD9
193
VDDcore1
16
36
VDDcore2
VDDcore3
68
VDDcore4
80
VDDcore5
96
VDDcore6
123
VDDcore7
138
VDDcore8
197
VSS1
9
VSS10
97
VSS11
113
VSS12
124
129
VSS13
VSS14
139
VSS15
147
104
TEST0
188
189
TEST1
TEST2
190
115
TEST3
TEST_IN
90
TEST_OUT0
116
TEST_OUT1
117
VDD1
8
VDD2
30
VDD3
48
VDD4
62
VDD5
88
VDD6
112
VDD7
128
VDD8
146
82
83
SDRAM_DATA27
SDRAM_DATA28
84
85
SDRAM_DATA29
SDRAM_DATA3
53
SDRAM_DATA30
86
SDRAM_DATA31
87
SDRAM_DATA4
54
55
SDRAM_DATA5
SDRAM_DATA6
56
SDRAM_DATA7
57
SDRAM_DATA8
58
SDRAM_DATA9
59
SDRAM_DQM
110
SDRAM_RASN
105
SDRAM_WEN
64
SDRAM_DATA12
SDRAM_DATA13
65
66
SDRAM_DATA14
SDRAM_DATA15
67
SDRAM_DATA16
70
SDRAM_DATA17
71
SDRAM_DATA18
72
73
SDRAM_DATA19
SDRAM_DATA2
52
SDRAM_DATA20
74
SDRAM_DATA21
75
SDRAM_DATA22
76
SDRAM_DATA23
77
SDRAM_DATA24
78
SDRAM_DATA25
79
SDRAM_DATA26
SDRAM_ADDR4
99
98
SDRAM_ADDR5
95
SDRAM_ADDR6
SDRAM_ADDR7
94
SDRAM_ADDR8
93
SDRAM_ADDR9
92
SDRAM_BA0
108
107
SDRAM_BA1
SDRAM_CASN
106
114
SDRAM_CLKIN
SDRAM_CLKOUT
111
SDRAM_CSN
109
SDRAM_DATA0
50
SDRAM_DATA1
51
SDRAM_DATA10
60
SDRAM_DATA11
61
R|Cr|CrCb_5
38
R|Cr|CrCb_6
39
R|Cr|CrCb_7
40
R|V|PR_OUT_2
140
141
R|V|PR_OUT_3
R|V|PR_OUT_4
142
R|V|PR_OUT_5
143
144
R|V|PR_OUT_6
R|V|PR_OUT_7
145
SCLK
45
SDATA
46
SDRAM_ADDR0
103
SDRAM_ADDR1
102
SDRAM_ADDR10
91
SDRAM_ADDR2
101
SDRAM_ADDR3
100
HSYNC2_PORT1
5
HSYNC_PORT2
208
4
IN_CLK1_PORT1
IN_CLK2_PORT1
10
IN_SEL
41
OE
156
PLL_PVDD
157
PLL_PVSS
158
RESET_N
47
R|Cr|CrCb_0
29
32
R|Cr|CrCb_1
R|Cr|CrCb_2
33
R|Cr|CrCb_3
34
35
R|Cr|CrCb_4
G|Y|Y_1
22
G|Y|Y_2
23
24
G|Y|Y_3
G|Y|Y_4
25
G|Y|Y_5
26
27
G|Y|Y_6
G|Y|Y_7
28
G|Y|Y|Y_OUT_0
148
G|Y|Y|Y_OUT_1
149
G|Y|Y|Y_OUT_2
150
G|Y|Y|Y_OUT_3
151
G|Y|Y|Y_OUT_4
152
G|Y|Y|Y_OUT_5
153
154
G|Y|Y|Y_OUT_6
G|Y|Y|Y_OUT_7
155
HSYNC1_PORT1
1
DAC_GR_AVSS
185
DAC_PVDD
187
DAC_PVSS
167
DAC_ROUT
176
DAC_RSET
180
168
DAC_VDD
DAC_VREFIN
182
DAC_VREFOUT
181
DAC_VSS
169
DEV_ADDR0
44
DEV_ADDR1
43
FIELD_ID1_PORT1
3
FIELD_ID2_PORT1
7
FIELD_ID_PORT2
206
42
FILM_SYNC_IN
G|Y|Y_0
21
D1_IN_4
202
D1_IN_5
203
D1_IN_6
204
205
D1_IN_7
183
DAC_AVDD
171
DAC_AVDDB
DAC_AVDDG
174
DAC_AVDDR
177
DAC_AVSS
184
DAC_AVSSB
172
DAC_AVSSG
175
DAC_AVSSR
178
DAC_BOUT
170
DAC_COMP
179
DAC_GOUT
173
DAC_GR_AVDD
186
B|U|Pb|C_OUT_5
133
B|U|Pb|C_OUT_6
134
B|U|Pb|C_OUT_7
135
136
B|U|Pb|C_OUT_8
B|U|Pb|C_OUT_9
137
CLKOUT
125
CLK_PORT2
195
CTLOUT0
118
CTLOUT1
119
CTLOUT2
120
CTLOUT3
121
CTLOUT4
122
196
D1_IN_0
D1_IN_1
199
D1_IN_2
200
D1_IN_3
201
AVSSPLL_SDI
163
159
AVSS_PLL_BE1
AVSS_PLL_BE2
162
B|Cb|D1_0
11
B|Cb|D1_1
12
B|Cb|D1_2
13
B|Cb|D1_3
14
15
B|Cb|D1_4
B|Cb|D1_5
18
B|Cb|D1_6
19
20
B|Cb|D1_7
126
B|U|Pb|C_OUT_0
B|U|Pb|C_OUT_1
127
B|U|Pb|C_OUT_2
130
B|U|Pb|C_OUT_3
131
B|U|Pb|C_OUT_4
132
7100
FLI2301
AVDDPLL_FE
165
AVDDPLL_SDI
164
AVDD_PLL_BE1
160
AVDD_PLL_BE2
161
AVSSPLL_FE
166
100n
2106
100n
2109
22R
3110
22R
3116
2136
100n
100n
2117
3142
22R
3113
22R
10u
220n
2131
GND_PS
5100
22R
3112
22R
2128
100n
3147
22R
3146
GND_PS
GND_PS
2112
100n
3121
100n
2139
22R
3114
22R
2149
100n
3139
22R
3132
22R
3107 100R
2122
100n
4101
22R
3131
22R
3138
22R
3118
22R
3103
10u
5101
22R
3143
220n
2143
2107
47u
2100
2145
47u
6
12 32 38 46 52 78 84
17 WE_
220n
15
29
43
3
9
35
41
49
55
75
81
44 58 72 86
DQ7
74
DQ8
76
DQ9
DQM0 16
DQM1 71
DQM2 28
DQM3 59
14
21
30
57
69
70
73
19 RAS_
1
DQ20
39
DQ21
40
DQ22
42
DQ23
45
DQ24
47
DQ25
48
DQ26
DQ27 50
51
DQ28
53
DQ29
7
DQ3
54
DQ30
56
DQ31
8
DQ4
10
DQ5
DQ6 11
13
CKE
68 CLK
20 CS_
2
DQ0
4
DQ1
77
DQ10
79
DQ11
DQ12 80
82
DQ13
83
DQ14
85
DQ15
31
DQ16
33
DQ17
34
DQ18
36
DQ19
DQ2 5
37
25 A0
26 A1
24 A10
27 A2
60 A3
A4
61
62 A5
63 A6
64 A7
65 A8
66 A9
22 BA0
23 BA1
CAS_
18
67
MT48LC2M32B2TG
7101
3125
22R
22R
3148
2110
100n
3163
22R
2170
4u7
22R
3161
2101
4105
GND_PS
100n
4110
2104
1u
YB(5)
YB(6)
YB(7)
+3V3_D
RESET
+3V3_D
+1V8_SCAN
+1V8_CORE
3170
4K7
DATA(24)
DATA(25)
DATA(26)
DATA(27)
DATA(28)
DATA(29)
DATA(30)
DATA(31)
SRAM_DQM
27M_CLK
27M_CLK
27M_CLK
+3V3_SCAN
YB(0)
YB(1)
YB(2)
YB(3)
YB(4)
ADD(7)
ADD(6)
ADD(5)
ADD(4)
ADD(3)
ADD(2)
ADD(1)
ADD(0)
DATA(0)
DATA(1)
DATA(2)
DATA(3)
DATA(4)
DATA(5)
DATA(6)
DATA(7)
DATA(8)
DATA(9)
DATA(10)
DATA(11)
DATA(12)
DATA(13)
DATA(14)
DATA(15)
DATA(16)
DATA(17)
DATA(18)
DATA(19)
DATA(20)
DATA(21)
DATA(22)
DATA(23)
+1V8_PLL
+3V3_DAC
SCL_3V3
SDA_3V3
+1V8_CORE
+3V3_D
+3V3_DAC
+3V3_D
+3V3_MEM
+3V3_MEM
+1V8_PLL
+1V8_DAC
WEN
CLK
CSN
CASN
RASN
BA0
BA1
ADD(10)
ADD(9)
ADD(8)
DATA(15)
DATA(16)
DATA(17)
DATA(18)
DATA(19)
DATA(20)
DATA(21)
DATA(22)
DATA(23)
DATA(24)
DATA(25)
DATA(26)
DATA(27)
DATA(28)
DATA(29)
DATA(30)
DATA(31)
ADD(10)
ADD(9)
ADD(8)
ADD(7)
ADD(6)
ADD(5)
ADD(4)
ADD(3)
ADD(2)
ADD(1)
ADD(0)
+3V3_D
+3V3_D
+1V8_CORE
HSYNC
RESET
BA0
BA1
CASN
RASN
+3V3_D
+3V3_D
+3V3_D
+3V3_D
+1V8_CORE
+1V8_CORE
+1V8_CORE
VSYNC
DATA(0)
DATA(1)
DATA(2)
DATA(3)
DATA(4)
DATA(5)
DATA(6)
DATA(7)
DATA(8)
DATA(9)
DATA(10)
DATA(11)
DATA(12)
DATA(13)
DATA(14)
CLK
CLK
CSN
SRAM_DQM
WEN
+1V8_PLL
YB(0)
YB(1)
YB(2)
YB(3)
YB(4)
YB(5)
YB(6)
YB(7)
Pr
Y
Pb
+1V8_DAC
VSYNC_MONO
8239_210_95352 for 3516 pt2 dd wk0315
Note : Some values may varies, see respective parts list for correct value.
: Provision
*
Summary of Contents for MX5800SA
Page 68: ...8239 210 93416 3139 113 3494pt6 dd wk0334 PART B 8 13 8 13 SUPPLY BOARD CHIP LAYOUT PART B ...
Page 76: ...3104 213 3525p5 dd wk0334 PART B 8 19 8 19 AMPLIFIER BOARD BOTTOM VIEW PART B ...
Page 78: ...3104 213 3525p5 dd wk0334 PART D 8 21 8 21 AMPLIFIER BOARD TOP VIEW PART D ...
Page 91: ...9 10 9 10 BOTTOM VIEW PART C PART C ...
Page 92: ...9 11 9 11 BOTTOM VIEW PART D PART D 3139 113 3500 pt6 dd wk334 ...
Page 95: ...9 14 9 14 BOTTOM VIEW PART G PART G ...
Page 96: ...9 15 9 15 BOTTOM VIEW PART H PART H 3139 113 3500 pt6 dd wk334 ...
Page 104: ...10 5 10 5 Exploded view 5DTC mechanic for orientation only ...
Page 111: ...BOTTOM VIEW COMPONENT LAYOUT For pcb layout 35037 11 4a 11 4a 3139 113 3503 pt 7 dd wk414 ...
Page 112: ...TOP VIEW PART A 11 5 11 5 PART A ...
Page 113: ...TOP VIEW PART B 11 6 11 6 PART B ...
Page 115: ...TOP VIEW PART B For pcb layout 35037 11 6a 11 6a 3139 113 3503 pt 7 dd wk414 PART B ...
Page 126: ...12 1 12 1 EXPLODED VIEW MAIN UNIT MX5800SA exploded view 3139 119 35170 dd wk318 ...