phyCORE-TC1796
14
©
PHYTEC Meßtechnik GmbH 2009 L-719e_2
Pin Number
Signal
I/O
Description
Pin Row X3B
1B
RTC_CLKOUT
O
Realtime Clock Clockout
(
refer to jumper J35
)
2B
P10
I/O
Microcontroller´s port P1.0,
used as interrupt (REQ0) input for onboard
Ethernet controller U21
P1.1 free to use if J25 is open
(refer to jumper J25)
3B
P12
I/O
Microcontroller´s port P1.2
used as interrupt (REQ2) input for onboard
I2C Master controller U12
P1.2 free to use if J40 is NOT populated
default: J40 is populated
4B, 9B, 14B, 19B,
24B, 29B, 34B,
39B, 44B, 49B,
54B, 59B, 64B,
69B, 74B, 79B
GND
Ground 0 V
5B
/CS2
O
Microcontroller´s Chip Select signal.
Used for second onboard SRAM-BANK
U19/U20
Free to use if the second RAM-Bank is
NOT populated or Jumper J18 is open
(refer to jumper J18)
6B
/CS1
I/O
Microcontroller´s Chip Select signal.
Used for first onboard SRAM-BANK
U17/U18
Free to use if the first RAM-Bank is NOT
populated or Jumper J17 is open
(refer to jumper J17)
7B
x/RD
O
Microcontroller´s read signal
8B, 10B, 11B,
12B, 13B, 15B,
16B, 17B, 23B,
25B, 26B, 27B
A0, A3, A5,
A6, A8, A11,
A13, A14, A16,
A19, A21, A22
O
Microcontroller´s Address lines, are used to
access on-board memory
18B, 20B, 21B,
22B, 28B, 30B,
31B, 32B, 37B,
38B, 40B, 41B,
42B, 43B, 45B,
46B
D0, D3, D5,
D6, D8,D11,
D13, D14, D16,
D18, D21, D23,
D24, D26, D29,
D31
I/O
Microcontroller´s Data lines, are used to
access on-board memory
33B
/BC1
O
Microcontroller´s Byte control signal for
data lines D[8..15].
35B
/HOLD
I
Microcontroller´s hold request input
36B /BREQ
O
Microcontroller´s
EBU Bus request
47B
/CSCOMB
O
Microcontroller´s Chip Select Output for
combination function
48B
MR/W
O
Microcontroller´s Motorola-style
Read/Write output
50B
/ADV
O
Microcontroller´s address valid output
