DVR-104
65
5
7
8
5
7
8
C
D
F
A
B
E
No.
Pin Name
I/O
Pin Function
67
MD9
I/O Data bus of buffer memory interface
68
MD6
I/O Data bus of buffer memory interface
69
MD8
I/O Data bus of buffer memory interface
70
MD7
I/O Data bus of buffer memory interface
71
DVDD25
−
2.5V positive power supply for digital
72
LDQM
O
I/O mask control signal of lower byte data
73
UDQM
O
I/O mask control signal of upper byte data
74
WE
O
Write enable signal of buffer memory interface
75
MCLK
O
Clock output for SDRAM
76
DVDD33
−
3.3V positive power supply for digital (buffer memory block)
77
DGND
−
Digital GND (buffer memory block)
78
CAS
O
Column address strobe control signal of buffer memory interface
79
MCKE
O
Clock enable control signal for SDRAM
80
RAS
O
Row address strobe control signal of buffer memory interface
81
MA11
O
Address bus of buffer memory interface
82
DVDD25
−
2.5V positive power supply for digital
83
MBA1
O
Bank address signal of buffer memory interface
84
MA9
O
Address bus of buffer memory interface
85
MBA0
O
Bank address signal of buffer memory interface
86
MA8
O
Address bus of buffer memory interface
87
DVDD33
−
3.3V positive power supply for digital (buffer memory block)
88
DGND
−
Digital GND (buffer memory block)
89
MA10
O
Address bus of buffer memory interface
90
MA7
O
Address bus of buffer memory interface
91
MA0
O
Address bus of buffer memory interface
92
MA6
O
Address bus of buffer memory interface
93
DGND
−
Digital GND
94
MA1
O
Address bus of buffer memory interface
95
MA5
O
Address bus of buffer memory interface
96
MA2
O
Address bus of buffer memory interface
97
MA4
O
Address bus of buffer memory interface
98
DVDD33
−
3.3V positive power supply for digital (buffer memory block)
99
DGND
−
Digital GND (buffer memory block)
100
MA3
O
Address bus of buffer memory interface
O
Phase comparator output of read channel
I/O Read channel clock output
I/O Read channel data output
−
Capacitor connection pin of read channel phase comparator
−
Capacitor connection pin of read channel phase comparator
I
Pin for charge pump adjustment of read channel phase comparator
−
Capacitor connection pin of read channel frequency comparator
−
2.5V positive power supply for digital (EFM-PLL block)
I
Analog reference current input pin of read channel
−
Analog GND (EFM-PLL block)
111
RCCKOUT
O
Read channel clock output
112
PLLJO
O
Jitter detection result output
113
EFM
O
EFM comparator output
114
ASY
I
Asymmetry adjustment voltage input of EFM comparator
115
AVDD
−
2.5V positive power supply for analog (EFM comparator block)
116
RFI
I
RF signal input to EFM comparator
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