34
HTP-071
1
2
3
4
A
B
C
D
E
F
1
2
3
4
• Block Diagram
Clock/ Data
Recovery
MPIO_ A
SELECTOR
MPIO_ C
SELECTOR
MPIO _B
SELECTOR
ADC
Com. Supply
MPO0/1
SELECTOR
MPO 0
MPO 1
MAI
N
OUTPUT
SCKO
BCK
LRCK
DOUT
PORT
RXI
N
8
RXI
N
9
RXI
N
10
RXI
N
11
DITOUT
AUTO
DIR
ADC
AUXI
N
0
AUXI
N
1
AUXI
N
2
AUTO
DIR
ADC
AUXI
N
0
AUXI
N
1
AUXI
N
2
AUTO
DIR
ADC
AUXI
N
0
AUXI
N
1
DIT
Lock :DIR
Unlock:ADC
AUXI
N
2
AUXOUT
OSC
Divider
XMCKO
Divider
XMCKO
DITOUT
RECOUT 0
RECOUT 1
AUXI
N
0
AUXI
N
1
ADC Standalone
ADC Mode
Control
Function
Control
REGISTER
POWER SUPPLY
MC /SCL
MDI /SDA
MDO /ADR 0
MS/ADR 1
FILT
PLL
DIR
Lock Detection
ERROR /I
N
T0
N
PCM /I
N
T1
ADC Clock
(SCK /BCK/LRCK)
(To MPIO _A & MPO0/1 )
ADC
MODE
DIR CS
( 48-bit)
DIT CS
( 48-bit)
DIR Interrupt
GPIO/GPO
Data
MPIO_ A
MPIO_ B
MPIO_ C
MPO0
MPO1
Divider
( to MPIO_A )
Secondary BCK / LRCK
Selector
RECOUT0
RECOUT1
SBCK /SLRCK
DOUT
RXI
N
7
SCKO/ BCK/LRCK
RXI
N
0
RXI
N
1
RXI
N
2
RXI
N
4/ASCKI 0
RXI
N
3
RXI
N
5/ABCKI 0
RXI
N
6/ALRCKI 0
7
N
I
X
R
0
N
I
D
A
/
7
N
I
X
R
RXI
N
6
RXI
N
5
RXI
N
4
RXI
N
3
RXI
N
2
RXI
N
1
RXI
N
0
MPIO_ A0
MPIO_ A1
MPIO_ A2
MPIO_ A3
VI
N
L
VI
N
R
VCOM
MPIO _C0
MPIO _C1
MPIO _C2
MPIO _C3
XTI
XTO
AG
N
D
VDDRX
G
N
DRX
DVDD
VCCAD
AG
N
DAD
DG
N
D
VCC
ADC
A
N
ALOG
DIR
A
N
ALOG
ALL
DIR
A
N
ALOG
SPI/I C
I
N
TERFACE
2
Reset
and Mode
Set
All Port
f Calculator
S
DIR
f Calculator
S
DIR
P and P
C
D
EXTRA DIR FU
N
CTIO
N
S
f Calculator
S
ERROR DETECTIO
N
N
on-PCM DETECTIO
N
Flags
DTS-CD/LD Detection
Validity Flag
User Data
Channel Status Data
BFRAME Detection
Interrupt System
MPIO_B3
MPIO_B2
MPIO_B1
MPIO_B0
RST
Summary of Contents for HTP-071
Page 9: ...9 HTP 071 5 6 7 8 5 6 7 8 A B C D E F ...
Page 12: ...12 HTP 071 1 2 3 4 A B C D E F 1 2 3 4 4 2 OVERALL BLOCK DIAGRAM H FRONT ASSY A INPUT ASSY ...
Page 89: ...89 HTP 071 5 6 7 8 5 6 7 8 A B C D E F C SIDE B CP1 CP3 CP5 CN1 CN3 ...
Page 93: ...93 HTP 071 5 6 7 8 5 6 7 8 A B C D E F D SIDE B CN600 CP104 ...