Magellan Developer’s Kit Electrical Specifications
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Magellan Motion Processer Developer’s Kit Manual
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3.6
PLX PCI Chip Information
The Developer’s Kit utilizes the PCI 9030 interface chip from PLX technology. For information on the operation of
this device please refer to the PLX documentation available from http://www.plxtech.com/.
The following table lists the relevant PLX local configuration register values. For further information refer to the PLX
documentation.
The following variables are used to access each space.
PCI_IOSPACE0_BASE = Second memory range as reported by the OS
PCI_IOSPACE1_BASE = Second IO range as reported by the OS
Dual_port_RAM= PCI_IOSPACE0_BASE
PMD_data_port = PCI_IOSPACE 0
PMD_cmd_status_port= PCI_IOSPACE 2
If the OS (Operating System) is MS Windows, the assigned IO spaces can be viewed in Device Manager/PMD PCI
DK1/Resources.
Space
Range
Remap
Descriptor
Chip Select
0 (DPRAM)
0FFFC000
00000001
00402081
00008001
1 (CP)
0FFFFFE1
00010001
00410080
00010011