5 - 1
3x3 UPS Functional description
Issue 2 - November 2001
Chapter 5 - Functional description
This chapter describes the principal PCB `s fitted to the UPS, there function, and configuration of the
potentiometers, test points and jumpers.
Abbreviations
The following abbreviations are used throughout.
P = potentiometer
TP = test point
JP = Jumper
5.1 - Control Logic PCB CS0072
The Control logic PCB integrates all the UPS'S functions, converter, inverter, static bypass. The control
is accomplished with programmable logic IC's fitted to the PCB. Their use significantly reduces the disĆ
crete components required, thus keeping any faults or problems to a minimum.
The principal circuit functions of the control logic are:
a)
Feedback circuits (inverter voltage, converter voltage, static bypass voltage, inverter
output current).
b)
Peak limit current detector circuits (inverter current and converter current).
c)
Control logic power supply detector.
d)
Overload detector.
e)
UPS status and alarms generated by the UPS's PCB's.
5.1.1 - Potentiometer adjustment
a)
P1 = adjust the inverter output voltage.
b)
P2 = adjust the converter DC voltage.
c)
P3 = adjust the UPS output threshold at
±
15%.
5.1.2 - Link and Jumper functions
a)
J1ĆJ2ĆJ3 define the UPS characteristics.
Link
Close
Open
J1
OnĆLine
OffĆline
J2
Freq. Tolerance 1%
Freq. Tolerance 4%
J3
50Hz
60Hz
b)
J4ĆJ5 define the parameters of the inverter output voltage and DC Bus voltage.
Output V/Link
J4
J5
Service
close
close
380
open
close
400
close
open
415
open
open