. 12-deep In-Order-Queue
. AGTL+ bus driver technology with integrated AGTL termination resistors (1.3-V
operation)
. Supports Enhanced Intel
®
SpeedStep
®
technology
Memory System
. Directly supports one DDR SDRAM channel, 64-bits wide
. Supports 200/266-MHz DDR SDRAM devices with max of 2 Double-Sided SO-DIMMs
(4 rows populated) with unbuffered PC1600/PC2100 DDR SDRAM (without ECC).
. Supports 128-Mbit, 256-Mbit, and 512-Mbit technologies providing maximum capacity
of 1-GB with x16 devices
. All supported devices have 4 banks
. Supports up to 16 simultaneous open pages
. Supports page sizes of 2-kB, 4-kB, 8-kB, and 16-kB. Page size is individually selected for
every row
. UMA support only
System Interrupts
. Supports Intel 8259 and Processor System Bus interrupt delivery mechanism
. Supports interrupts signaled as upstream Memory Writes from PCI and Hub Interface
. MSI sent to the CPU through the System Bus
. From IOxAPIC in ICH4-M
. Provides redirection for upstream interrupts to the System Bus
Hub Interface to ICH4-M
. 266 -MB/s point-to-point Hub Interface to ICH4-M
. 66-MHz base clock
Power Management
. SMRAM space remapping to A0000h (128-kB)
. Supports extended SMRAM space above 256-MB, additional 1-MB TSEG from Top of
Memory,cacheable (cacheability controlled by CPU)
. APM Rev 1.2 compliant power management
. Supports Suspend to System Memory (S3), Suspend to Disk (S4) and Hard Off/Total
Reboot (S5)
. ACPI 1.0b, 2.0 Support
Package
. 732-pin Micro-FCBGA (37.5 x 37.5 mm)
4.5.2 Intel ICH4 Features
The ICH4 provides extensive I/O support. Functions and capabilities include:
•
PCI Local Bus Specification, Revision 2.2-compliant with support for 33-MHz PCI
operations.
•
PCI slots (supports up to 6 Req/Gnt pairs)
•
ACPI Power Management Logic Support
TECHNICAL SERVICE MANUAL
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