PROCESSOR TECHNOLOGY CORPORATION
Sol OPERATING PROCEDURES
SECTION VII
VII-29
Set S3 switches to select the Baud rate required by the modem
or current loop device. (Standard 8-level TTY's operate at 110 Baud,
S3-2 ON and all other S3 switches OFF.) For standard 8-level TTY's and
most modems, set all S4 switches OFF. (This selects eight data bits,
two stop bits, no parity bit and full duplex operation for the SDI.
Figures 7-6 and 7-7 show examples of current loop and modem
interconnections to the Sol SDI connector (Jl). The ASR33 TTY is used
to illustrate a current loop interconnect, and the Bell 103 modem is
used to illustrate a modem interconnect.
When operating in the terminal mode and full duplex. Sol
keyboard data is transmitted out on Pin 2 of Jl and date received on
Pin 3 of Jl is displayed on the video monitor. In the command mode,
SOLOS set in and out commands can be used to channel output data and
input data through the SDI. (Refer to your SOLOS Users' Manual for
instructions on how to use the set commands.)
In either mode, the LOCAL key directly controls the SDI. With
the LOCAL indicator light on, received data is ignored and keyboard
data is not transmitted. It is, however, looped back for display on
the video monitor. With the LOCAL light off, received data is
displayed and keyboard data is transmitted but not displayed unless it
is echoed back.
7.9.3
Parallel Data Interface (PDI)
The Sol Parallel Data Interface (J2) is used to drive parallel
devices such as paper tape readers/punches and line printers. It
provides eight output data lines, eight input data lines, four
handshaking signals and three control signals. The latter allow up to
four devices to share the PDI connector. (See Appendix VII for J2
pinouts.)
The port address for parallel input and output data is FD
(hexadecimal), and the control port address for the PDI is FA
(hexadecimal). PXDR is available at bit 2 of port FA. When this bit
is set to 0, the external device is ready to receive a byte of data.
PDR is available at bit I of port FA, with 0 indicating the external
device is ready to send a byte of data. Parallel Unit Select (PUS) is
controlled by bit 4 of port FA. The input and output enable lines are
available for tri-stating an external two-way data bus.
Use of the three control signals is optional and is unnecessary
when only one device is connected to the PDI connector.
(Paragraph 7.9.3 continued on Page 31.)
Summary of Contents for Sol-PC
Page 35: ......
Page 89: ......
Page 90: ......
Page 91: ......
Page 92: ......
Page 93: ......
Page 94: ......
Page 95: ......
Page 96: ......
Page 97: ......
Page 98: ......
Page 99: ......
Page 100: ......
Page 101: ......
Page 102: ......
Page 103: ......
Page 104: ......
Page 105: ......
Page 106: ......
Page 107: ......
Page 108: ......
Page 151: ...VIII 11...
Page 167: ...VIII 27...
Page 186: ......
Page 187: ...SECTION IX SOFTWARE Sol TERMINAL COMPUTERTM Processor Technology...
Page 191: ......
Page 197: ......
Page 223: ......
Page 224: ......
Page 225: ......
Page 226: ......
Page 227: ......
Page 228: ......
Page 229: ......
Page 230: ......
Page 231: ......
Page 232: ......
Page 233: ......
Page 234: ......
Page 235: ......
Page 236: ......
Page 237: ......
Page 238: ......
Page 239: ......
Page 240: ......
Page 241: ......
Page 242: ......
Page 243: ......
Page 244: ......
Page 245: ......
Page 246: ......
Page 247: ......
Page 248: ......
Page 249: ......
Page 250: ......
Page 251: ......
Page 252: ......
Page 253: ......
Page 254: ......
Page 255: ......
Page 256: ......
Page 257: ......
Page 258: ......
Page 259: ......
Page 260: ......
Page 261: ......
Page 262: ......
Page 263: ......
Page 264: ......
Page 265: ......
Page 266: ......
Page 267: ......
Page 268: ......
Page 269: ......
Page 270: ......
Page 271: ......
Page 272: ......
Page 273: ......
Page 274: ......
Page 275: ......
Page 276: ......
Page 277: ......
Page 278: ......
Page 279: ......
Page 280: ......
Page 281: ......
Page 282: ......
Page 283: ......
Page 284: ......