22
42.
AGNDC
Analog reference voltage high voltage part
43.
AHVSS
Analog ground
44.
CAPL_C1
Volume capacitor Channel1
45.
AHVSUP
Analog power supply 8.0 V
46.
CAPL_C2
Volume capacitor Channel2
47.
SC1_OUT_L
Scart output 1, left
48.
SC1_OUT_R
Scart output 1, right
49.
VREF1
Reference ground 1 high voltage part
50.
SC2_OUT_L
Scart output 2, left
51.
SC2_OUT_R
Scart output 2, right
52.
ASG3
Analog Shield Ground 3
53.
NC
Not connected
54.
NC
Not connected
55.
NC
Not connected
56.
DACC1_L
Analog output Channel 1, left
57.
DACC1_R
Analog output Channel 1, right
58.
VREF2
Reference ground 2 high voltage part
59.
DACC2_L
Analog output Channel 2, left
60.
DACC2_R
Analog output Channel 2, right
61.
RESETQ
Power-on-reset
62.
NC
Not connected
63.
NC
Not connected
64.
I²S_DA_OUT2
I²S2-data output
65.
I²S_DA_IN2
I²S2-data input
66.
DVSS
Digital ground
67.
DVSUP
Digital power 5 V
68.
NC
Not connected
SDA 9488X
High-end Picture-In-Picture (PIP) IC
Features
n
Single chip solution:
- AD-conversion for CVBS or Y/C or YUV, multistandard color decoding, PLL for synchronization of inset channel,
decimation filtering, embedded memory, RGB-matrix, DA-conversion, RGB/YUV switch, data-slicer and clock
generation integrated on chip
n
Analog inputs:
- 3x CVBS or 1x CVBS and 1x Y/C or 1xYUV alternatively
- Clamping of each input
- All ADCs with 8 bit amplitude resolution
- Automatic Gain Control (AGC) for Y and CVBS
n
Inset Synchronization:
- Multiple time constants for reliable synchronization
- Automatic recognition of 625 lines / 525 lines standard
n
Color Decoder:
- PAL-B/G, PAL-M, PAL-N(Argentina), PAL60, NTSC-M, NTSC4.4 and SECAM
- Adjustable Chroma Saturation
- Hue Control for NTSC
- Automatic Chroma Control (-24 dB ... +6 dB)
- Automatic recognition of chroma standards: different search strategies selectable
- Single crystal for all standards
- IF-characteristic compensation filter
n
Display Features:
- 16:9 compatibility
- Display on VGA and SVGA screen (f H limited to 40kHz)
- Coarse positioning at 4 corners of the parent picture
n
Output signal processing:
- 7 Bit DAC
- RGB or YUV switch: connection of an external source without PIP processing
- Analog outputs: Y, +(B-Y), +(R-Y), or Y, -(B-Y), -(R-Y) or RGB.
- Three RGB matrices available: NTSC(Japan), NTSC(USA) or EBU
- Slicing of closed-caption or WSS data (violence blocking capability)
n
I²C-Bus control (400 kHz)
n
High stability clock generation
n
SDA 9388X / SDA 9389X pinout compatibility
n
3.3V supply voltage (5V input capable)
PINNING
1.
XIN
crystal oscillator (input) or crystal clock (from another IC)
2.
XQ
crystal oscillator (output)
3.
HSP
horizontal sync for parent channel
4.
VSP
vertical sync for parent channel
5.
SDA
I²C-bus data
6.
SCL
I²C-bus clock
7.
VDD
digital supply voltage
8.
VSS
digital ground
9.
I²C
I²C Address
