Quatech 802.11B/G, Product Specification

Page 1: ...Product Specification 802 11b g High Performance Enterprise Device Server Revision 1 2 July 2010 File name databook wlng dp500 family v1 2 doc Document Number 100 8080 120...

Page 2: ...Quatech Inc Airborne Enterprise Module Databook 2 7 15 2010 100 8080 120 Page Intentionally Left Blank...

Page 3: ...The reader remains responsible for the system design and for ensuring that the overall system satisfies its design objectives taking due account of the information presented herein the specifications...

Page 4: ...Quatech Inc Airborne Enterprise Module Databook 4 7 15 2010 100 8080 120 Page Intentionally Left Blank...

Page 5: ...racteristics Transmitter 19 6 2 Performance Range 19 7 0 SPI Interface 21 7 1 Pinout 21 7 2 SPI AC Characteristics 22 7 3 SPI Protocol 23 7 4 SPI Commands 24 8 0 Antenna 27 8 1 Antenna Selection 27 8...

Page 6: ...Pin Definition 11 Table 3 UART Pin Definition 13 Table 4 Absolute Maximum Values 1 16 Table 5 Operating Conditions DC Specification 16 Table 6 RF Characteristics 802 11b g 18 Table 7 Supported Data Ra...

Page 7: ...following convention will be used The area next to the indicator will identify the specific information and make any references necessary The area next to the indicator will identify the specific inf...

Page 8: ...ver TCP IP stack UDP telnet FTP server Data bridging and buffering Command Line Interface Web interface WPA Supplicant 802 11 Radio Driver Supports antenna diversity Operating Temperature 40 C to 85 C...

Page 9: ...Airborne Enterprise Module Databook Quatech Inc 100 8080 120 7 15 2010 9 3 0 Block Diagram The following outlines the block diagram of the radio Figure 2 WLNG SE SP AN ET DP500 Block Diagram...

Page 10: ...th RS232 422 485 Driver Control l l l l l l l l l l WLNG SP DP501 802 11b g SPI Interface l l l l l l l l WLNG AN DP501 802 11b g UART Interface l l l l l l l l l l WLNG ET DP501 802 11b g 10 100 Ethe...

Page 11: ...RXD All DIN Debug 9 RXD2 UART DIN UART2 RXD2 Serial DIN UART2 RXD2 SPI DIN UART2 RXD2 Ethernet DIN UART2 G6 All GPIO 10 TDO All JTAG Test data out 11 FRESET All Factory RESET 12 CTS1 UART Clear to Sen...

Page 12: ...tion Indicator F6 GPIO 24 RXD1 UART DIN UART1 RXD1 Serial DIN UART1 MOSI SPI DIN SPI RXD1 Ethernet DIN UART1 F7 All GPIO 25 LED_POST All POST Status Indicator F0 GPIO 26 LED_WLN_CFG All Module TCP IP...

Page 13: ...to a 2 wire only The primary digital UART can be used as the primary connection for the Serial device type This type supports a 7 wire interface to allow the definition of the serial interface type RS...

Page 14: ...er It is recommended that a connection to this port be supported via test points or a two pin header The default settings for the debug port are 115200 8 N 1 No Flow Control CAUTION Do not use the deb...

Page 15: ...ors to the radio J1 36 pin Digital Host interface Hirose DF12 36DP 0 5V XX 0 50mm 020 Pitch Plug Surface Mount Dual Row Vertical 4 00mm Stack Height 36 Circuits J2 Primary RF connector for 802 11b g a...

Page 16: ...age 2 0 VDD 0 3 VOL Output Low Level Voltage 0 4 VOH Output High Level Voltage VDD 0 4 ICCTXG Operating Current UART Data In 802 11g Transmitting 54Mb s UART 100 Duty Cycle 920K BAUD 340 360 mA ICCRXG...

Page 17: ...nd CPU on No data traffic UART 340 360 mA ICCE Radio and CPU on No data traffic Ethernet 330 350 mA ISBU0 Radio off UART CPU Idle radio off f w control 350 360 mA ISBE0 Radio off Ethernet CPU Idle rad...

Page 18: ...ak dBm mW Units POUTB Transmit Power Output 802 11b 11 5 5 2 1 13 15 31 6 19 3 85 1 dBm mW POUTG Transmit Power Output 802 11g 6 9 12 18 24 36 48 54 10 12 15 9 21 5 141 3 dBm mW PRSENB Receive Sensiti...

Page 19: ...02 11g US Canada 2 401 2 473 11 1 11 Europe 2 401 2 483 13 1 13 France 2 446 2 483 4 10 13 Japan 2 401 2 483 13 1 13 1 Only channels 1 6 and 11 are non overlapping 6 1 AC Electrical Characteristics Tr...

Page 20: ...135m 215m 6Mb s 802 11a 49m 155m 54Mb s 802 11g 12m 19m 54Mb s 802 11a 4 5m 14m Ranges are based on receiver sensitivity Transmitter power free space path loss estimates antenna gain factors and link...

Page 21: ...ve Out MISO 28 Master Out Slave In MOSI 24 SPI Interrupt SPI_INT 22 SPI Clock SPI_CLK 18 SPI Select SPI_SEL 12 Data In RxD2 DTXD 9 8 Data out TxD2 DRXD 21 6 Ready to Send RTS2 17 Clear to Send CTS2 19...

Page 22: ...C Timings Symbol Parameter Min Typ Max Units fMAX Maximum Clock Frequency 8 00 MHz tCS SPI Select Low to Clock Rising Edge 100 ns tCH Clock High 62 5 ns tCL Clock Low 62 5 ns tDA Clock High to Data Ou...

Page 23: ...s of the TX message header The RX message header consists of a RX Data Available field and a TX Buffer Available field The RX Data Available field indicates the number of data bytes the Device Server...

Page 24: ...e BREAK command will issue a break sequence to the module It is analogous to the BREAK signal on a common UART Use this command to issue a BREAK if the esc mode serial brk setting is configured in the...

Page 25: ...st has received all the RX data available from the module All other bits of PARM1 are unused for this command and should be set to zero PARM2 is unused for this command and should be set to zero For e...

Page 26: ...e module In CLI mode this data will be the local echoing of the commands issued to the module as well as the command responses generated by the module If the module has an active data connection estab...

Page 27: ...Host Chassis mounted antenna Embedded antenna In addition to the above options location and performance need to be considered the following sections discuss these items 8 2 Host Board Mounted Antenna...

Page 28: ...ulk head mounting there are no connector choice restrictions for use with the FCC IOC modular certification However if the flying lead connector is used the same restrictions as identified for the Hos...

Page 29: ...system using this approach maybe slightly more complex since the antenna is not necessarily mounted on the host PCBA 8 5 Antenna Location The importance of this design choice cannot be over stressed...

Page 30: ...ermine the link rate generally as the link quality for a given link rate drops below a predefined limit the radio will drop to the next lowest link rate and try to communicate using it The reciprocal...

Page 31: ...ee Path Loss dB RxS Receiver receive sensitivity dBm RxA Receiver antenna gain dBi RxC Receiver to Antenna coax cable loss dB This is a complex subject and requires more information than is presented...

Page 32: ...following timing and signal conditions Figure 5 Power on RESET Timing Figure 6 RESET Timing Table 17 RESET Timing Symbol Parameter Min Typ Max Units tPURST Valid VDD to RESET valid 200 ms tRLRV RESET...

Page 33: ...Where control of the RESET signal by system level monitor is not possible Quatech recommend the use of the circuit in Figure 7 or one similar This circuit controls the RESET signal relative to power...

Page 34: ...Tolerance 1 27 0 05 unless noted 40 60 1 60 MAX 30 70 1 21 MIN 1 84 0 07 12 37 0 49 MAX 29 60 1 17 MAX 18 27 0 72 MIN 15 90 0 63 3X 1 00 0 04 3X 2 00 0 08 Part Hirose DF12 36DS 0 5V Not available for...

Page 35: ...Stack Height 36 Circuits Board Connector DF12 36DP 0 5V XX Hirose Hirose 0 50mm 020 Pitch Plug Surface Mount Dual Row Vertical 4 00mm Stack Height 36 Circuits RF Connector U FL Hirose Ultra Small Surf...

Page 36: ...ructions may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation If this equipment does cause harmful interfe...

Page 37: ...rne WLN modules the customers are relieved of any need to perform FCC part15 subpart C Intentional Radiator testing and certification except where they wish to use an antenna that is not already certi...

Page 38: ...ve any concerns regarding the hardware integration Contact Quatech Technical support for a copy of the FCC and IOC grant certificates the test reports and updated approved antenna list 11 5 Regulatory...

Page 39: ...tive humidity cycle Altitude Sect 4 8 Operational 0 12 000ft 62 KPa absolute pressure Non operational 0 40 000ft 18 6 KPa absolute pressure Vibration Sect 4 9 Operational 2 4 Grms 10 1K Hz 1hr per axi...

Page 40: ...tion 5 3 SPI interface section 6 0 Table 4 0 Changed maximum voltage to 4 0VDC Table 5 0 Updated Power state labels and values 7 0 Added section 7 0 SPI interface specification 11 5 Added reference to...