LPWA Module Series
BG950A-GL&BG951A-GL_Hardware_Design
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About the Document
Revision History
Version
Date
Author
Description
-
2021-07-07
Lex LI/
Ben JIANG
Creation of the document
1.0.0
2021-07-07
Lex LI/
Ben JIANG
Preliminary
1.0.1
2021-11-04
Lex LI/
Ben JIANG
Preliminary:
1. Updated pin 27 from AUX/GNSS_TXD into
CLI/GNSS_TXD;
Updated pin 28 from AUX/GNSS_RXD into
CLI/GNSS_RXD;
Updated pin 94 from RESERVED into CLI_RXD;
Updated pin 95 from RESERVED into CLI_TXD;
Updated pin 75 from RESERVED into GNSS_BOOT;
Updated pin 76 from RESERVED into GNSS_NRST;
Updated pin 97 from RESERVED into GNSS_EN;
Updated pin 98 from RESERVED into SFNIND_1PPS.
2. Added the weight of BG950A-GL&BG951A-GL (Table 2).
3. Added the GNSS function description of BG951A-GL
(Table 3).
4. Updated the USB serial driver information (Table 4).
5. Added the block diagram of BG951A-GL (Figure 2).
6. Updated the power up timing (Figure 9).
7. Updated the power down timing in (Figure 10&11)
8. Added the recovery mode (Chapter 3.1&Chapter 3.6).
9. Added the steps to let the module enter e-l-DRX mode
(Chapter 3.4).
10. Updated the description of sleep mode (Chapter 3.5).
11. Updated the description of the PON_TRIG pin (Chapter
3.3&Chapter 3.11).
12. Updated the information UART interface (Table
4&Chapter 4.3).
