LTE Module Series
EC21 Hardware Design
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BT_CTS*
40
DO
BT UART clear to send
1.8V power domain
PCM_IN
1)
24
DI
PCM data input
1.8V power domain
PCM_OUT
1)
25
DO
PCM data output
1.8V power domain
PCM_SYNC
1)
26
IO
PCM data frame sync signal
1.8V power domain
PCM_CLK
1)
27
IO
PCM data bit clock
1.8V power domain
BT_EN*
139
DO
WLAN function control via FC20
module. Active high.
1.8V power domain
1.
“*” means under development.
2.
1)
Pads 24~27 are multiplexing pins used for audio design on EC21 module and BT function on FC20
module.
The following figure shows a reference design of wireless connectivity interfaces with Quectel FC20
module.
Module
SDC1_DATA3
SDC1_DATA2
SDC1_DATA1
SDC1_DATA0
SDC1_CLK
SDC1_CMD
WLAN_EN
COEX_UART_TX
WAKE_ON_WIRELESS
COEX_UART_RX
WLAN_SLP_CLK
BT_EN
PM_ENABLE
BT_RTS
BT_CTS
BT_TXD
BT_RXD
PCM_IN
PCM_OUT
PCM_CLK
DCDC/LDO
PCM_SYNC
SDIO_D3
SDIO_D2
SDIO_D1
SDIO_D0
SDIO_CLK
SDIO_CMD
WLAN_EN
32KHz_IN
WAKE_ON_WIRELESS
LTE_UART_TXD
LTE_UART_RXD
FC20 Module
BT_EN
BT_UART_RTS
BT_UART_CTS
BT_UART_RXD
BT_UART_TXD
PCM_OUT
PCM_IN
PCM_CLK
PCM_SYNC
VDD_3V3
WLAN
COEX & Control
BT
Figure 29: Reference Circuit of Wireless Connectivity Interfaces with FC20 Module
NOTES
Quectel
Confidential