LTE Standard Module Series
EG25-GL_Hardware_Design 22 / 96
MAIN_DCD
63
DO
Main UART data
carrier detect
VDD_EXT
open.
MAIN_CTS
64
DO
DTE clear to send
signal from DCE
VDD_EXT
Connect to DTE
’s
CTS
.
1.8 V power domain.
If unused, keep it
open.
MAIN_RTS
65
DI
DTE request to send
signal to DCE
VDD_EXT
Connect to DTE's
RTS.
1.8 V power domain.
If unused, keep it
open.
MAIN_DTR
66
DI
Main UART data
terminal ready
VDD_EXT
1.8 V power domain.
Pulled up by default.
The pin can wake up
the module in the low
level.
If unused, keep it
open.
MAIN_TXD
67
DO
Main UART transmit
VDD_EXT
1.8 V power domain.
If unused, keep it
open.
MAIN_RXD
68
DI
Main UART receive
VDD_EXT
Debug UART Interface
Pin Name
Pin No.
I/O
Description
DC Characteristics Comment
DBG_TXD
12
DO
Debug UART transmit VDD_EXT
1.8 V power domain.
If unused, keep it
open.
DBG_RXD
11
DI
Debug UART receive
VDD_EXT
ADC Interfaces
Pin Name
Pin No.
I/O
Description
DC Characteristics Comment
ADC0
45
AI
General-purpose
analog to digital
converter
Voltage range:
0.3 V to VBAT_BB
If unused, keep it
open.
ADC1
44
AI
General-purpose
analog to digital
converter