M20 Hardware Design
5 Electrical, reliability and radio characteristics
5.1 PIN assignment of the module
Table
31:
PIN
assignment
PIN NO.
PIN NAME
I/O
PIN NO.
PIN NAME
I/O
1 SIM_CLK O 50 AGND
2 SIM_VDD
O 49 SPK2P
O
3 SIM_DATA
I/O
48 SPK1P
O
4 SIM_RST
O 47 SPK1N
O
5 SIM_PRESENCE
I 46 MIC2N I
6 SIM_GND
45 MIC2P
I
7 RXDDAI I/O
44 MIC1P
I
8 TFSDAI O 43 MIC1N I
9 SCLK
O 42 AGND
10 TXDDAI O 41 PWRKEY I
11 Reserve O 40 EMERG_OFF
I
12 ADC1
I 39 DCD0
O
13 NETLIGHT
I/O 38 CTS1
O
14 TXD1
O 37 CTS0
O
15 TXD0
O 36 RTS1
I
16 RXD1
I 35 DTR0
I
17 RXD0
I 34 RTS0
I
18 VRTC
I/O 33 Reserve
19 VCHG
I 32 RI0
O
20 Reserve
31 VDD_EXT O
21 GND
30 VBAT
I
22 GND
29 VBAT
I
23 GND
28 VBAT
I
24 GND
27 VBAT
I
25 GND
26 VBAT
I
Note: Please keep all reserved pins open.
M20_HD_V1.01
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Quectel
