Automotive Module Series
AG521R-NA QuecOpen
Hardware Design
AG521R-NA_QuecOpen_Hardware_Design 58 / 92
3.14.
SPI Interfaces
The module provides two SPI interfaces supporting only master mode. The maximum clock frequency of SPI is up
to 50 MHz.
Table 20: Pin Definition of SPI Interfaces
The following figure shows the timing relationship of SPI interfaces. The related parameters of SPI timing are
shown in the table below.
SPI_CS
SPI_CLK
SPI_MOSI
SPI_MISO
MSB
1
2
3
T
t(mov)
4
t(mis)
t(mih)
t(ch) t(cl)
Figure 26: SPI Timing
Table 21: Parameters of SPI Interface Timing
Pin Name
Pin No.
I/O
Description
Comment
SPI1_CLK
216
DO
SPI1 clock
1.8 V power domain.
Can be configured to GPIO.
If unused, keep them open.
SPI1_CS
213
DO
SPI1 chip select
SPI1_MISO
219
DI
SPI1 master-in salve-out
SPI1_MOSI
210
DO
SPI1 master-out slave-in
Parameter
Description
Min.
Typ.
Max.
Unit
T
SPI clock period
20.0
-
-
ns
t(ch)
SPI clock high-level time
9.0
-
-
ns
