Smart LTE Module Series
SC600Y&SC600T Hardware Design
SC600Y&SC600T_Hardware_Design 73 / 128
CSI1_LN0_P
185
AI
MIPI lane 0 data signal of
depth camera (positive)
CSI1_LN1_N
188
AI
MIPI lane 1 data signal of
depth camera (negative)
CSI1_LN1_P
187
AI
MIPI lane 1 data signal of
depth camera (positive)
CSI1_LN2_N
190
AI
MIPI lane 2 data signal of
depth camera (negative)
Can be multiplexed into
differential data of the fourth
camera (negative)
CSI1_LN2_P
189
AI
MIPI lane 2 data signal of
depth camera (positive)
Can be multiplexed into
differential data of the fourth
camera (positive)
CSI1_LN3_N
192
AI
MIPI lane 3 data signal of
depth camera (negative)
Can be multiplexed into
differential clock of the
fourth camera (negative)
CSI1_LN3_P
191
AI
MIPI lane 3 data signal of
depth camera (positive)
Can be multiplexed into
differential clock of the
fourth camera (positive)
CSI2_CLK_N
78
AI
MIPI clock signal of front
camera (negative)
CSI2_CLK_P
77
AI
MIPI clock signal of front
camera (positive)
CSI2_LN0_N
80
AI
MIPI lane 0 data signal of
front camera (negative)
CSI2_LN0_P
79
AI
MIPI lane 0 data signal of
front camera (positive)
CSI2_LN1_N
82
AI
MIPI lane 1 data signal of
front camera (negative)
CSI2_LN1_P
81
AI
MIPI lane 1 data signal of
front camera (positive)
CSI2_LN2_N
84
AI
MIPI lane 2 data signal of
front camera (negative)
CSI2_LN2_P
83
AI
MIPI lane 2 data signal of
front camera (positive)
CSI2_LN3_N
86
AI
MIPI lane 3 data signal of
front camera (negative)
CSI2_LN3_P
85
AI
MIPI lane 3 data signal of
front camera (positive)
MCAM_MCLK
99
DO
Master clock signal of rear
camera
SCAM_MCLK
100
DO
Master clock signal of front
camera
