Smart LTE Module Series
SC66 Hardware Design
SC66_Hardware_Design 76 / 139
GPIO_04B
14
DO
Camera AVDD power
LDO enable pin
CSI0_CLK_N
78
AI
MIPI clock signal of front camera (-)
CSI0_CLK_P
77
AI
MIPI clock signal of front camera (+)
CSI0_LN0_N
80
AI
MIPI lane 0 data signal of front camera
(-)
CSI0_LN0_P
79
AI
MIPI lane 0 data signal of front camera
(+)
CSI0_LN1_N
82
AI
MIPI lane 1 data signal of front camera
(-)
CSI0_LN1_P
81
AI
MIPI lane 1 data signal of front camera
(+)
CSI0_LN2_N
84
AI
MIPI lane 2 data signal of front camera
(-)
CSI0_LN2_P
83
AI
MIPI lane 2 data signal of front camera
(+)
CSI0_LN3_N
86
AI
MIPI lane 3 data signal of front camera
(-)
CSI0_LN3_P
85
AI
MIPI lane 3 data signal of front camera
(+)
CSI1_CLK_N
89
AI
MIPI clock signal of rear camera (-)
CSI1_CLK_P
88
AI
MIPI clock signal of rear camera (+)
CSI1_LN0_N
91
AI
MIPI data0 signal of rear camera (-)
CSI1_LN0_P
90
AI
MIPI data0 signal of rear camera (+)
CSI1_LN1_N
93
AI
MIPI data 1 signal of rear camera (-)
CSI1_LN1_P
92
AI
MIPI data 1 signal of rear camera (+)
CSI1_LN2_N
95
AI
MIPI data 2 signal of rear camera (-)
CSI1_LN2_P
94
AI
MIPI data 2 signal of rear camera (+)
CSI1_LN3_N
97
AI
MIPI data 3 signal of rear camera (-)
CSI1_LN3_P
96
AI
MIPI data 3 signal of rear camera (+)
CSI2_CLK_N
184
AI
MIPI clock signal of depth camera (-)
CSI2_CLK_P
183
AI
MIPI clock signal of depth camera (+)