Smart Module Series
SC690A_Series_Hardware_Design 73 / 105
4.18.2. Reference Circuit Design for Receiver Interface
EAR_P
EAR_M
F2
C2
C3
C1
F1
Module
D1
D2
33 pF
33 pF
33 pF
Figure 26: Reference Circuit Design for Receiver Interface
4.18.3. Reference Circuit Design for Headset Interface
ESD
MIC2_M
MIC2_P
HPH_L
HS_DET
HPH_R
HPH_GND
Module
3
6
4
5
2
1
C1
C2
C3
F4
F3
F2
D1 D2 D3 D4
F5
R3
R4
MIC_BAIS2
R
2
R
1
F1
C4
0 R
100 nF
33 pF
33 pF 33 pF
20 K
2
.2
K
2
.2
K
Figure 27: Reference Circuit Design for Headset Interface
