Redpine Signals, Inc. Proprietary and Confidential
Page 25
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1.2.7
UART mode Interface Schematic
UART Circuitry
C15
0.1uF
UART1-TX
DB9-TXD
DB9-RXD
C16
0.1uF
UART1-RX
C20
0.1uF
C22
0.1uF
U3
MAX3232CDBR
GND
15
VCC
16
R1IN
13
R2IN
8
T2IN
10
T1IN
11
C1+
1
C1-
3
C2+
4
C2-
5
R1OUT
12
R2OUT
9
T1OUT
14
T2OUT
7
V+
2
V-
6
C21
0.1uF
DB9_FEMALE
DB9-TXD
DB9-RXD
R14
0E(NP)
DB9-RTS
DB9-CTS
UART1-CTS
UART1-RTS
DB9-RTS
DB9-CTS
P1
5
9
4
8
3
7
2
6
1
VIN_33
FB9
BEAD
C17
0.1uF
VDD_EXT
FB8
BEAD
VIN_33
C170
0.1uF
J13
1
2
3
DVDD33
C8
47uF(CASE B)
C9
0.1uF
C171
100uF(CaseB)
FB6
BEAD
DC Source
VIN_33
FB7
BEAD
VRF33
C19
10uF(0805)
C18
22uF(CASE B)
C23
0.1uF
Tantalum
C25
0.1uF
L1
4.7uH
C26
1uF
VINMOD
Host select pull-dow n resistors are
required only in
WiSeConnect/Connect-io-n module
based designs.
OPTION-3
RESET_N
MCU pin
driving
RESET_N
H os t M C U may direc tly drive the RE SE T _N
pin of the module as s hown below.
R13
10K
Note: Ensure a reset assertion time of 20ms.
HOST MCU
If the device is configured in UART Mode
only,connect
SDIO_CLK,SDIO_CMD,SDIO_DATA1,SDIO_DATA2 to
ground through a 51K pull dow n resistor
OPTION-1
RESET_N
C14
8.2nF
R9
1M
R12
100K
U2
MAX6415
VCC
5
SRT
4
RESETn
1
GND
2
RESET IN
3
C12
0.1uF
R
11
1M
Title
Size
Document Number
Rev
Date:
Sheet
of
RS9113 based Module with integrated antenna -UART
1
1
SW
1
1
2
RESET Circuitry
OPTION-2
Rev0.0
VOUT33
VOUT33
R20
51K
R18
4.7K
R19
4.7K
Redpine Signals Confidential
Power Supply Filter Section
RESET_N
R10
100K
C13
0.1uF
VIN_33
GPIO_16
R24
4.7K(NP)
R23
4.7K(NP)
R22
4.7K(NP)
RESET_N
C4
10uF(0805)
R25
1K
R26
1K
R27
1K
C3
2.2uF
U1
RS9113 based Module
HOST_SEL_0
36
VIN_MOD
33
GPIO_21
31
GPIO_16
25
GPIO_15
24
USB_VDDP
21
GPIO_18
30
GPIO_17
28
SDIO_DATA2
16
SDIO_CLK
18
SDIO_DATA3
15
SDIO_DATA1
14
SDIO_CMD
17
SDIO_DATA0
13
USB_VDDS
22
USB_VBUS
9
USB_DP
11
USB_ID
12
HOST_SEL_1
35
WURX
1
GPIO_19
32
GPIO_11
7
GPIO_12
41
VRF33
34
GPIO_10
5
GPIO_14
8
GPIO_9
6
GPIO_13
49
XTAL_32Khz_N
4
XTAL_32Khz_P
3
VBATT
52
ULP_ANAGPI
50
RESET_N
51
USB_VDDD
42
JP1
48
JP0
47
BOOTLOAD_EN
27
USB_DN
10
SDIO_VDD_18_33
19
GPIO_8
29
VOUTLDOP3
40
USB_VDDA
43
HOST_BB_EN
39
ULP_GPIO_0
2
AUX_DAC_OUT
38
JP2
45
JNC
46
BOOT_MODE_0
20
AUX_ADC_IN0
44
GPIO_7
23
VOUTLDOP1
37
GPIO_2
26
GN
D
53
GN
D
54
GN
D
55
GN
D
56
GN
D
57
GN
D
58
GN
D
59
GN
D
60
GN
D
61
GN
D
62
GN
D
63
GN
D
64
GN
D
65
GN
D
66
GN
D
67
GN
D
68
GN
D
69
GN
D
70
GN
D
71
GN
D
72
GN
D
73
GN
D
74
GND
75
GND
76
GND
77
GND
78
GND
79
with integrated antenna
VINMOD
VRF33
DVDD33
GPIO_16
D1
LED
LED Indication
VDD_EXT
R8
820E
Note:
R22 should be mounted w hen ULP not USED
C10
20pF
C24
20pF
Y 1
MC-146
1
4
Note:
R24 should be mounted for USB Enumeration
R24 should not be mounted for USB_CDC Enumeration
NO POPULATE
Note:
Y1 is used for accurate w akeup time
Figure 7: UART mode Interface Schematic