UG
036
R
ev 0.00
Pa
ge
5
o
f
17
Aug
u
st 7
,
20
15
lSL82
73
MEV
A
L1Z
ISL8273MEVAL1Z Schematic
FIGURE 5. SCHEMATIC
RELEASED BY:
DRAWN BY:
SHEET
HRDWR ID
DATE:
DATE:
DATE:
TESTER
FILENAME:
MASK#
REV.
OF
DATE:
ENGINEER:
TITLE:
UPDATED BY:
TIM KLEMANN
ISL8273M/ISL8273MEVAL1ZA
11/14/2014
1
1
ISL8273MEVAL1Z
SCHEMATIC
EVALUATION BOARD
ISL8273M 80A
TAO TAO
TIM KLEMANN
04/21/2015
A1
GND
TO SEQUEL
FROM PREQUEL
FROM PREQUEL
TO SEQUEL
GND
PGND TIED TO SGND
DISABLE
ENABLE
UNDER DUT
COMMUNICATION CONNECTION
INTER-DEVICE CONNECTION
DDC
DDC
EN
PG
PG
PG
PHASE1
PHASE2
SA
SALRT
SALRT
SCL
SCL
SDA
SDA
SYNC
SYNC
UVLO
V25
VCC
VCC
VCC
VCC
VCC
VI2C
VIN
VMON
VOUT
VOUT
VO
U
T
VOUT
VR5
VR5
5
VR6
VSENN
VSENP
R3
4.75K
J1
5
R5
DNP
TP8
J10
C1
0.
1UF
SW1
1
2
3
TP3
3
5
1 2
4
6
J2
1
2
3
4
5
6
TP6
3
5
1 2
4
6
J3
1
2
3
4
5
6
C3
470UF
R54
0.
01
C6
22UF
100UF
C27
SCL
SDA
SALRT
VIN
VIN
VIN
PG
N
D
NC
V
DRV
1
SA
V
DRV
1
NC
VSET
EN
VOUT
VSENP
VSENN
VOUT
NC
NC
PG
ASCR
V
DRV
V
DRV
SS/UVLO
CS
MGN
PG
N
D
PG
N
D
VC
C
V2
5
VR
5
VR
6
SWD2
SWD1
SW1
PGND
SW2
PGND
PGND
PGND
PGND
PGND
VMON
SGND
SGND
SGND
SGND
SGND
DDC
SYNC
PG
N
D
PG
N
D
VR
VR
5
5
NC
NC
VD
D
U1
ISL8273MAIRZ
PAD6
M14
K16
J16
H16
C9
D4
C7
C8
C5
C6
G4
F4
D13
E4
C10
C11
C12
C13
PAD8
N6
PAD9
N1
6
PAD1
1
M1
G1
5
K1
4
L14
M1
3
L2
M1
0
PAD1
0
PAD1
2
R8
M5
R1
7
M1
7
N5
E1
4
D1
4
G14
D5
F15
E15
PAD15
PAD16
P11
PAD7
PAD4
PAD2
H3
H4
PAD13
PAD14
L3
PAD5
PAD3
PAD1
J8
3
5
1 2
4
6
J1
1
2
3
4
5
6
TP5
C23
100UF
R4
DNP
R57
47K
DNP
R6
100UF
C21
J7
J5
DNP
R7
R
VSET
21.
5K
C16
100UF
C8
10UF
C30
100UF
1.5K
R8
J16
47UF
C7
0
R12
C12
10UF
22UF
C
VSEN
J6
22UF
C5
470UF
C18
470UF
C24
TP2
C13
100UF
TP4
0
R11
R13
200
R10
10K
RE
D
GR
N
D1
I00000273
1
2
3
4
47UF
C26
C31
470UF
22UF
C4
100UF
C14
100UF
C28
12
J1
1
C17
10UF
470UF
C19
C9
10UF
470UF
C25
TP1
TP12
C2
22UF
C22
100UF
TP9
6.
65K
R2
TP11
2N7002L
Q1
1
2
3
10UF
C10
C32
470UF
R
F
SET
17.
8K
BSC010NE2LSI
U2
1
2
3
4
5
6
7
8
C29
100UF
R1
100K
TP10
C20
100UF
10UF
C11
J9
1.5K
R9
100UF
C15
TP7
3
5
1 2
4
6
J4
1
2
3
4
5
6
