CHAPTER 13 A/D CONVERTER
Page 309 of 920
13.6.4
Hardware trigger no-wait mode (select mode, one-shot conversion mode)
<1> In the stop status, the ADCE bit of A/D converter mode register 0 (ADM0) is set to 1, and the system
enters the A/D conversion standby status.
<2> After the software counts up to the stabilization wait time (1
μ
s), the ADCS bit of the ADM0 register is
set to 1 to place the system in the hardware trigger standby status (and conversion does not start at
this stage). Note that, while in this status, A/D conversion does not start even if ADCS is set to 1.
<3> If a hardware trigger is input while ADCS = 1, A/D conversion is performed on the four analog input
channels specified by scan 0 to scan 3, which are specified by the analog input channel specification
register (ADS). A/D conversion is performed on the analog input channels in order, starting with that
specified by scan 0.
<4> A/D conversion is sequentially performed on the four analog input channels, the conversion results
are stored in the A/D conversion result register (ADCR, ADCRH) each time conversion ends, and the
A/D conversion end interrupt request signal (INTAD) is generated.
<5> After A/D conversion of the four channels ends, the ADCS bit remains set to 1, and the system
enters the A/D conversion standby status.
<6> If a hardware trigger is input during conversion operation, the current A/D conversion is interrupted,
and conversion restarts at the first channel. The partially converted data is discarded.
<7> When the value of the ADS register is rewritten or overwritten during conversion operation, the
current A/D conversion is interrupted, and A/D conversion is performed on the first channel
respecified by the ADS register. The partially converted data is discarded.
<8> When ADCS is overwritten with 1 during conversion operation, the current A/D conversion is
interrupted, and conversion restarts at the first channel. The partially converted data is discarded.
<9> When ADCS is cleared to 0 during conversion operation, the current A/D conversion is interrupted,
and the system enters the A/D conversion standby status. However, the A/D converter does not stop
in this status.
<10>When ADCE is cleared to 0 while in the A/D conversion standby status, the A/D converter enters the
stop status. When ADCS = 0, inputting a hardware trigger is ignored and A/D conversion does not
start.
Figure 13 - 21 Example of Hardware Trigger No-Wait Mode (Select Mode, One-Shot Conversion Mode) Operation
Timing
<R>
<R>
ADS is rewritten during
A/D conversion
operation
(from ANI0 to ANI1).
<1> ADCE is set to 1.
<2> ADCS is set to 1.
ADCE
Hardware
trigger
ADCS
ADS
A/D
conversion
status
ADCR,
ADCRH
INTAD
Conversion
stops
Conversion
standby
Data 1
(ANI0)
Trigger
standby
Data 2
(ANI0)
Data 3
(ANI0)
Trigger
standby
Data 4
(ANI0)
Data 5
(ANI1)
Trigger
standby
Data 6
(ANI1)
Data 7
(ANI1)
Trigger
standby
Data 8
(ANI1)
Conversion
standby
Conversion
stops
Data 1
(ANI0)
Data 3
(ANI0)
Data 5
(ANI1)
Data 7
(ANI1)
The trigger is not
acknowledged.
Trigger
standby
status
ADCS retains
the value 1.
<3>
<3>
<6>
<3>
<3>
A hardware trigger is
generated during A/D
conversion operation.
ADCE is cleared to 0.<10>
<5>
<8>
<5>
<5>
ANI0
ANI1
Conversion is
interrupted.
Conversion is
interrupted
and restarts.
<4>
<4>
<4> A/D conversion ends.
Conversion is
interrupted
and restarts.
Conversion is
Interrupted and
restarts after
conversion start
time has elapsed.
<7>
A hardware trigger
is generated.
<3>
ADCS is overwritten
with 1 during
A/D conversion
operation.
<5>
<4>
Conversion is activated
<9>
ADCS is clearedto 0
during A/D conversion
operation.
The trigger is not
acknowledged.
Trigger
standby
Conversion is activated
Conversion is activated
Conversion is activated
Conversion is activated
Summary of Contents for RL78/G1H
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