CHAPTER 30 INSTRUCTION SET
Page 842 of 920
Note 1.
Number of CPU clocks (f
CLK
) when the internal RAM area, SFR area, or extended SFR area is accessed, or when no
data is accessed.
Note 2.
Number of CPU clocks (f
CLK
) when the code flash memory is accessed, or when the data flash memory is accessed by
an 8-bit instruction.
Remark
Number of clock is when program exists in the internal ROM (flash memory) area. If fetching the instruction from the
internal RAM area, the number becomes double number plus 3 clocks at a maximum.
Table 30 - 9 Operation List (5/18)
Instruction
Group
Mnemonic
Operands
Bytes
Clocks
Clocks
Flag
Z
AC
CY
16-bit data
transfer
MOVW
AX, [DE]
1
1
4
AX
←
(DE)
[DE], AX
1
1
—
(DE)
←
AX
AX, ES:[DE]
2
2
5
AX
←
(ES, DE)
ES:[DE], AX
2
2
—
(ES, DE)
←
AX
AX, [HL]
1
1
4
AX
←
(HL)
[HL], AX
1
1
—
(HL)
←
AX
AX, ES:[HL]
2
2
5
AX
←
(ES, HL)
ES:[HL], AX
2
2
—
(ES, HL)
←
AX
AX, [DE+byte]
2
1
4
AX
←
(DE + byte)
[DE+byte], AX
2
1
—
(DE + byte)
←
AX
AX, ES:[DE+byte]
3
2
5
AX
←
((ES, DE) + byte)
ES:[DE+byte], AX
3
2
—
((ES, DE) + byte)
←
AX
AX, [HL+byte]
2
1
4
AX
←
(HL + byte)
[HL+byte], AX
2
1
—
(HL + byte)
←
AX
AX, ES:[HL+byte]
3
2
5
AX
←
((ES, HL) + byte)
ES:[HL+byte], AX
3
2
—
((ES, HL) + byte)
←
AX
AX, [SP+byte]
2
1
—
AX
←
(SP + byte)
[SP+byte], AX
2
1
—
(SP + byte)
←
AX
AX, word[B]
3
1
4
AX
←
(B + word)
word[B], AX
3
1
—
(B + word)
←
AX
AX, ES:word[B]
4
2
5
AX
←
((ES, B) + word)
ES:word[B], AX
4
2
—
((ES, B) + word)
←
AX
AX, word[C]
3
1
4
AX
←
(C + word)
word[C], AX
3
1
—
(C + word)
←
AX
AX, ES:word[C]
4
2
5
AX
←
((ES, C) + word)
ES:word[C], AX
4
2
—
((ES, C) + word)
←
AX
AX, word[BC]
3
1
4
AX
←
(BC + word)
word[BC], AX
3
1
—
(BC + word)
←
AX
AX, ES:word[BC]
4
2
5
AX
←
((ES, BC) + word)
ES:word[BC], AX
4
2
—
((ES, BC) + word)
←
AX
Summary of Contents for RL78/G1H
Page 941: ...R01UH0575EJ0120 RL78 G1H...
