R01UH0823EJ0100 Rev.1.00
Page 724 of 1823
Jul 31, 2019
RX23W Group
25. 16-Bit Timer Pulse Unit (TPUa)
25.9.16
Continuous Output of Input-Capture Pulse Interrupt Signal
When input-capture signal is set on both edges and when the pulse width of the input-capture input equals to one PCLK
cycle detected by internal sampling, input capture is generated continuously on the rising and falling edges. Therefore, an
input-capture pulse interrupt signal is output continuously to form a flat signal level.
When a pulse interrupt signal is used, the interrupt controller cannot detect the second and subsequent interrupts.
shows an operation timing when the input-capture pulse interrupt signal is output continuously.
Figure 25.54
Continuous Output of Input-Capture Pulse Interrupt Signal
PCLK
Input-capture input
Input-capture signal
Input-capture pulse
interrupt signal
Input capture on rising edge
Input capture on falling edge
