R01UH0823EJ0100 Rev.1.00
Page 818 of 1823
Jul 31, 2019
RX23W Group
29. Low-Power Timer (LPT)
29.3.2
Count Timing of Low-Power Timer Counter
The LPTCR1.LPCNTPSSEL[2:0] bits are used to select the counter clock to be input to the low-power timer counter
from among five clocks derived from dividing the clock source selected by the LPTCR1.LPCNTCKSEL bit by 2 to 32,
respectively.
shows the count timing of the low-power timer counter in this case.
Figure 29.4
Count Timing of Low-Power Timer Counter
29.3.3
Clearing Timing of Low-Power Timer Counter
Writing 1 to the LPTCR3.LPCNTRST bit
clears the low-power timer counter.
This bit automatically becomes 0 when the clearing of the counter is completed.
shows the clearing timing of the low-power timer counter in this case.
Note 1. Write to the LPTCR3.LPCNTRST bit while the LPTCR3.LPCNTEN bit is 0 (low-power timer counter stops).
Figure 29.5
Clearing Timing of Low-Power Timer Counter
Counter clock
Low-power timer counter
Clock source
i = 2, 4, 8, 16, 32
N – 1
N
N + 1
Period of clock source × i
LPTCR3.LPCNTRST
Clock source
System clock
Low-power timer counter
N
0
Automatically becomes 0
Write 1
