28
Mar.2001
SP-303
CIRCUIT DIAGRAM(DIGITAL2)
fig.digital2
GA
7 Seg LED
to ANALOG
CODEC
TO SW BOARD
CN9
A14
CD_XWE
GA-DMA-REQ0
CD_XRE
GA-DMA-REQ0
D15
CD_SW
D14
A10
CD_XWE
A5
D13
A7
A18
CD3
A8
GA-DMA-REQ1
D10
CS5
CD7
D12
CD1
D9
A6
GA-DMA-REQ1
D9
A12
A3
A8
CD4
CD6
D15
CS5
CS2
GA-DMA-ACK0
CD3
D12
D10
CLOCK-OUT
CD7
A9
CD_XRE
CD_XWP
A4
CD_XWP
D11
CPU-INT
D13
CPU-WAIT
CLOCK-OUT
CD2
D14
A7
GA-DMA-ACK0
CD_XCE
GA-DMA-ACK1
A17
CD2
CD_CLE
A6
A11
CD8
A9
A3
A15
CD1
CPU-INT
D8
D11
A13
CD5
CD_XCE
CD_ALE
A4
A19
CPU-UCAS
CD6
CD5
D8
CD8
A16
GA-DMA-ACK1
CS2
CD_ALE
CD_CLE
CD4
CPU-WAIT
A5
ADDRESS[0-23]
CONTROL[0-50]
DATA[0-15]
CS3
A0
CPU-LCAS
D7
D6
D7
RESET
D0
D0
CPU-RD
DSP-INT1
D4
D4
D2
D2
A2
A2
D3
D1
D5
A1
CPU-RD
RESET
DSP-INT
D3
D6
D1
D5
CPU-LCAS
A1
A19
A13
A17
GA-DMA-ACK1
D13
A10
A7
A6
D11
GA-DMA-ACK0
CPU-UCAS
GA-DMA-REQ0
CS5
CS2
A15
D9
A18
A8
A4
A11
A5
D14
D12
A9
CLOCK-OUT
A14
A12
D10
CPU-WAIT
C-ADDATA
A3
A16
CPU-INT
D8
D15
CODEC-MCK
CODEC-BCK
CODEC-LRCK
RESET
D1
D0
D3
A1
A0
D5
D2
DSP-INT
A2
CPU-LCAS
D4
C-DADATA
CPU-RD
DSP-INT1
D7
D6
CS3
GA-DMA-REQ1
+
D 3. 3
+5
D
D
D
+
D
3. 3
D
D
D
D
D
+5
D
D
+5
D
D
+
D
3. 3
D
D
D
D
D
D
D
+5
D
L1
N2012Z601T
R218
1k
R217
1k
R186
150
R219
1k
RA3
EXBV8V680JV
1
8
2
7
3
6
4
5
C105
100/6.3
C108
0.01
RA2
EXBV8V680JV
1
8
2
7
3
6
4
5
CN3
RIBON CABLE 11P
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
L2
N2012Z601T02
L26
N2012Z601T0
C107
0.1
C97
0.1
C100
100/6.3
C102
0.1
C99
0.1
R238
10k
R233
1.5K
Q25
RN1307
1
2
3
R234
10K
R65
10K
C101
0.1
Q7
2SA1602A
1
3
2
Q9
2SA1602A
1
3
2
Q8
2SA1602A
1
3
2
C109
0.1
Q23
RN1307
1
2
3
Q24
RN1307
1
2
3
R236
10k
IC14
LC24085B-SD1
VSS
1
NC
2
NC
3
D4
4
D5
5
D6
6
D7
7
D8
8
D9
9
D10
10
D11
11
D12
12
D13
13
D14
14
D15
15
A1
16
A2
17
VDD
18
VSS
19
A3
20
A4
21
A5
22
A6
23
A7
24
A8
25
A9
26
CPU-WR
27
CPU-RD
28
CPU-CS
29
XP-CS-IN
30
SM-CS-IN
31
PHAI
32
RESET
33
NC
34
NC
35
VSS
36
VDD
37
PLL-LOCK
38
S1
39
S2
40
PLL-SEND
41
AR-SYNC-WCK
42
WCK-IN
43
SPRX-LRCK
44
SPRX-BCK
45
SPRX-SD
46
WAIT-CA
47
WAIT-CB-XP-WAIT
48
XP-LRCK
49
XP-WCK
50
XP-SCK
51
XP-SD-AR-TRG
52
XP-WR-AR-TRG
53
HVDD
54
VSS
55
XP-CLK
56
PLL-RTRN
57
RESET-CTRL
58
LCD-POWER-UD
59
LCD-D7
60
LCD-D6
61
LCD-D5
62
LCD-D4
63
LCD-D3
64
LCD-D2
65
LCD-D1
66
LCD-D0
67
LCD-E
68
LCD-RW
69
LCD-RS
70
NC
71
VSS
72
VDD
73
NC
74
NC
75
PROTECT
76
CLE
77
CE
78
ALE
79
RE
80
WE
81
R/B
82
WP
83
SM-D0
84
SM-D1
85
SM-D7
86
SM-D2
87
SM-D6
88
SM-D3
89
VDD
90
VSS
91
XTAL
92
EXTAL
93
SM-D5
94
SM-D4
95
SW
96
TEST
97
ADIN0
98
DAOUT0
99
ADIN1
100
DAOUT1
101
MCK
102
BCK
103
LRCK
104
7SEG-COM4
105
NC
106
NC
107
VSS
108
VDD
109
ENC-A
110
ENC-B
111
7SEG-COM0
112
7SEG-COM1
113
7SEG-COM2
114
7SEG-COM3
115
7SEG-D0
116
7SEG-D1
117
7SEG-D2
118
7SEG-D3
119
7SEG-D4
120
7SEG-D5
121
7SEG-D6
122
7SEG-D7
123
CPU-WCK
124
WAIT-OUT
125
VDD
126
VSS
127
CD-CS
128
CD-DETECT
129
A18
130
A19
131
DMA-REQ0
132
DMA-REQ1
133
DMA-REQ2
134
DMA-ACK0
135
DMA-ACK1
136
DMA-ACK2
137
INT-OUT
138
D0
139
D1
140
D2
141
D3
142
NC
143
VDD
144
R237
10k
C106
0.1
IC20
TD62385F
COM
10
GND
9
I1
1
I2
2
I3
3
I4
4
I5
5
I6
6
I7
7
I8
8
O8
11
O7
12
O6
13
O5
14
O4
15
O3
16
O2
17
O1
18
C92
0.1
R243
10k
C263
100p
L27
N2012Z601T0
L40
N2012Z601T02
L41
N2012Z601T02
L42
N2012Z601T02
L43
N2012Z601T02
L44
N2012Z601T02
L45
N2012Z601T02
L46
N2012Z601T02
L47
N2012Z601T02
C292
100p
C293
100p
C294
100p
C295
100p
C296
100p
C297
100p
C298
100p
C299
100p
L48
N2012Z601T02
L49
N2012Z601T02
L50
N2012Z601T02
C302
100p
C303
100p
C304
100p
R246
10k
R247
22_1/4W
C301
470/6.3
Summary of Contents for Dr. Sample SP-303
Page 3: ...3 Mar 2001 SP 303 ...
Page 4: ...4 Mar 2001 SP 303 LOCATION OF CONTROLS fig panel 6 2 1 7 8 11 13 12 11 10 9 15 5 3 4 14 ...
Page 7: ...7 Mar 2001 SP 303 fig_exploded eps 10 b 6 b 5 5 5 5 12 11 9 5 13 14 15 16 7 8 c 8 ...
Page 22: ...22 Mar 2001 SP 303 CIRCUIT BOARD fig_compornent eps ...
Page 23: ...23 Mar 2001 SP 303 fig_compornent eps View from compornent side ...
Page 24: ...24 Mar 2001 SP 303 CIRCUIT BOARD fig_foil eps ...
Page 25: ...25 Mar 2001 SP 303 fig_foil eps View from foil side ...
Page 35: ...35 Mar 2001 SP 303 ...
Page 36: ...36 Mar 2001 SP 303 ...