Circuit Operation Description
6-23
Samsung Electronics
6-3 Testing the Main ICs
1. SDA6001(IC907) - MICOM
(1) Verify that the proper power is supplied (3.3V, 2.5V).
(2) Validate that the pin RESET is HIGH (Pin 73).
(3) I2C-BUS (I2C 1:Pins 98 and 99, I2C: Pins 100 and 101)
(4) Verify that the input/output between SDA6001 and the MEMORY (IC801 & IC802) are normal.
2. VSP9437C (IC401) <<>> Check when the input mode is TV, S-Video, or Component 1, 2 (Standard
Definition)
(1) Verify that the proper power is supplied (5V, 3.3V).
(2) Validate that the pin RESET is HIGH (Pin 24).
(3) Check the I2C-BUS (Pins 13 and 6)
(4) Validate that the output clock 656CLK (Pin 9) is 13.5MHz.
(5) Validate the outputs of H SYNC (Pin 17) and V SYNC (Pin 23).
(6) Validate the digital data output.
3. FLI2310 (IC701) - DEINTERLACER <<>> Check when the input mode is TV, S-Video, or Component 1, 2
(Standard Definition)
(1) Verify that the proper power is supplied (3.3V, 1.8V).
(2) Validate that the pin RESET is HIGH (Pin 47).
(3) Check the I2C-BUS (Pins 45 and 46)
(4) Validate that data input is normal.
656CLK (Pins 4 & 195): 13.5MHz, HOUT (Pin 1): 15.75KHz, VOUT (Pin 2): 60Hz
(5) Validate that data output is normal.
S23CLK (Pin 125): 27MHz, S23_HS (Pin 119): 31.5KHz, S23_VS (Pin 118): 60Hz
(6) Verify that the input/output between FLI2310 and the MEMORY (IC702) is normal.
4. CXA2151Q (Analog Board IC101) – COMPONENT S/W & SYNC SEPARATION <<>> Check when the
input mode is Component 1, 2 (High Definition), or PC input.
(1) Verify that the proper power is supplied (5V)
(2) Validate the output of I2C-BUS (Pins 30 & 31).
(3) Validate that the Y, Pb, and PR input is normal.
(4) Validate that data output is normal.
CXA_R, CXA_B, CXA_G (Pins 25, 26 and 27), CXA2151_HSYNC (Pin 22): 45KHz (in case of 720P),
CXA2151_VSYNC (Pin 23): 60Hz
5. AD9883(IC502) - A/D CONVERTER <<>> Check when the input mode is Component 1, 2 (High
Definition), or PC input.
(1) Verify that the proper power is supplied (3.3V)
(2) Validate the output of I2C-BUS (Pins 56 & 57).
(3) Validate that the video input signal (Pins 43, 48 and 54), HSYNC (Pin 30) and VSYNC (Pin 31) is normal.
(4) Validate that data output is normal.
R, G, B digital data output (RA501 ~ RA505), ASI_SUB_H (Pin 66): 45KHz (in case of 720P), ASI_SUB_V
(Pin 64): 60Hz, ASI_SUB_CLK (Pin 67)
Summary of Contents for D61B
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Page 30: ...4 20 Samsung Electronics MEMO ...
Page 38: ...Alignment and Adjustments 2 8 Samsung Electronics MEMO ...
Page 61: ...Fig 18 Chopper Circuit 6 22 Samsung Electronics Circuit Operation Description ...
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Page 106: ...Samsung Electronics Schematic Diagrams 10 7 10 7 SMPS 2 ...
Page 107: ...Schematic Diagrams 10 8 Samsung Electronics 10 8 SMPS 3 ...
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