Samsung MP-200, Service Manual

Page 1: ...PLAYER MP 200 SERVICEManual MP3 PLAYER CONTENTS 1 Exploded Views and Parts List 2 Electrical Parts List 3 Block Diagrams 4 PCB Diagrams 5 Wiring Diagram 6 Schematic Diagrams 7 IC Internal Diagram 8 Reference Information ...

Page 2: ...d u p a t o r ELECTRONICS Samsung Electronics Co Ltd SEP 2000 Printed in Korea Code no AH68 00036G ...

Page 3: ...d u p a t o r Samsung Electronics 1 1 1 Exploded View and Parts List 1 1 Total Exploded 22 5 1 7 6 8 9 10 24 23 21 2 3 14 15 11 12 20 25 13 18 16 17 19 4 A A A A B A A A A A ...

Page 4: ...688A BUTTON VOLUME ABS NATURAL Cr P 1 12 AH67 00072B CAP ECP SILICON RUBBER GREEN 1 13 AH64 00687A BUTTON PRESET ABS NATURAL Cr P 1 14 AH64 00696A WINDOW SMART ACRYL SMOKE 1 15 AH64 00693A DECO BOTTOM ABS NATURAL Cr P 1 16 AH64 00690A KNOB SMART ABS L GRAY SPRAY SILVER 1 17 AH64 00697A LID BATTERY ABS L GRAY SPRAY SILVER 1 18 AH61 00440A SHAFT CARRYING SUS303 Φ1 0 XL11 8 1 19 AH61 00417A SPRING RE...

Page 5: ... DECODER MAS3507D QG F10 QFP 44P 5 5V R19 2007 000026 R CHIP 200OHM 5 1 10W DA TP 2012 R4 2007 000026 R CHIP 200OHM 5 1 10W DA TP 2012 R21 2007 000028 R CHIP 39ohm 5 1 10W DA TP 2012 R22 2007 000028 R CHIP 39ohm 5 1 10W DA TP 2012 R23 2007 000028 R CHIP 39ohm 5 1 10W DA TP 2012 R24 2007 000028 R CHIP 39ohm 5 1 10W DA TP 2012 R53 2007 000030 R CHIP 560ohm 5 1 10W DA TP 2012 R2 2007 000267 R CHIP 1 ...

Page 6: ...d u p a t o r Samsung Electronics 3 1 3 Block Diagram 3 1 Main ...

Page 7: ...d u p a t o r Samsung Electronics 4 1 4 Printed Circuit Board Diagram 4 1 LCD 4 2 SMC Top View Bottom View Top View Bottom View ...

Page 8: ...d u p a t o r Samsung Electronics 5 1 5 Wiring Diagram ...

Page 9: ...d u p a t o r Samsung Electronics 6 1 6 Schematic Diagram 6 1 LCD ...

Page 10: ...d u p a t o r 6 2 Samsung Electronics 6 2 SMC ...

Page 11: ...IT tPHL tPLH Propagation delay An to Bn Bn to An CL 15 pF VCC 3 3 V 7 0 ns CI Input capacitance 3 5 pF CI O Input output capacitance 10 pF CPD Power dissipation capacitance per buffer VCC 3 3 V VI GND to VCC note 1 40 pF NOTE 1 CPD is used to determine the dynamic power dissipation PD in µW PD CPD VCC 2 fi ȍ CL VCC 2 fo where fi input frequency in MHz CL output load capacitance in pF fo output fre...

Page 12: ...3 PIN CONFIGURATION SV00624 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 DIR A0 A1 A2 A3 A4 A5 A6 A7 GND B7 B6 B5 B4 B3 B2 B1 B0 OE VCC LOGIC SYMBOL IEEE IEC SV00626 G3 3EN1 3EN2 19 1 1 2 18 2 3 17 4 16 5 15 6 14 7 13 8 12 9 11 LOGIC SYMBOL 5 SV00625 A0 DIR B0 OE A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 1 2 3 4 6 7 8 9 19 18 17 16 15 14 13 12 11 ...

Page 13: ...Tamb 25 C tr tf 2 5 ns SYMBOL PARAMETER CONDITIONS TYPICAL UNIT tPHL tPLH Propagation delay 1An to 1Yn 2An to 2Yn CL 15 pF VCC 3 3 V 8 0 ns CI Input capacitance 3 5 pF CPD Power dissipation capacitance per buffer VCC 3 3 V VI GND to VCC 1 35 pF NOTE 1 CPD is used to determine the dynamic power dissipation PD in µW PD CPD VCC 2 fi ȍ CL VCC 2 fo where fi input frequency in MHz CL output load capacit...

Page 14: ... 0 V 17 15 13 11 2A0 to 2A3 Data inputs 18 16 14 12 1Y0 to 1Y3 Bus outputs 19 2OE Output enable input active LOW 20 VCC Positive supply voltage LOGIC SYMBOL IEEE IEC SV00666 18 16 14 12 2 4 6 8 EN 1 9 7 5 3 11 13 15 17 EN 19 FUNCTIONAL DIAGRAM SV00622 2Y0 3 2Y1 5 2Y2 7 2Y3 9 2A0 17 2A1 15 2A2 13 2A3 11 2OE 19 1Y0 18 1Y1 16 1Y2 14 1Y3 12 1A0 2 1A1 4 1A2 6 1A3 8 1OE 1 FUNCTION TABLE INPUTS OUTPUT nO...

Page 15: ...EG 1 2 layer 2 3 audio decoder MAS 3507D No crystal required for standard applications with sample rates from 32 to 48 kHz Crystal required only for automatic sample rate detection below 32 kHz MPEG mode refer to Section 2 10 and use of clock output CLKOUT 1 1 Main Features no master main input clock required integrated stereo headphone amplifier and mono speaker amplifier SNR of 103 dBA I2 C bus ...

Page 16: ...dphone Amplifier Digital Supply Analog Control I2 C Analog Low pass Filter Sample Rate PLL Multibit DAC Deemphasis Op Amps Vdd Vss AVDD0 AVDD1 AVSS0 AVSS1 VREF AGNDC SDA SCL PORQ DEECTRL MCS1 MCS2 AUX1R AUX2R DEEMR FOPR FOUTR FINR OUTR OUTL FINL FOUTL DEEML AUX2L AUX1L XTO XTI CLKOUT CLI DAI WSI TESTEN Switch Matrix FOPL Line Out 9 10 3 2 44 1 16 15 27 26 19 21 20 32 30 35 42 41 43 18 17 5 7 39 37...

Page 17: ... quality audio it is recommended to use the 32 bit mode of the I2 S interface to make use of the full dynamic range if more than 16 bits are available Left Right Selection Standard I2 S format defines an audio frame always starting with left channel and low state of WSI How ever I2 C control allows changing the polarity of WSI Delay Bit Standard I2 S format requires a delay of one clock cycle betw...

Page 18: ...in the audio band 2 5 Analog Low pass The analog low pass is a first order filter with a cut off frequency of approximately 1 4 MHz which removes the high frequency components of the noise shaping signal 2 6 Input Select and Mixing Matrix This block is used to switch between or mix the auxil iary inputs and the signals coming from the DAC A switch matrix allows to select between mono and ste reo m...

Page 19: ... right channel must be switched to inverse polarity In order to optimize the available power the source of the two output amplifi ers should be identical i e a monaural signal Please note that if a speaker is connected it should strictly be connected as shown in Fig 2 5 Never use a separate connector for the speaker because electro static discharge could damage the output transistors FOPL AVOL_R F...

Page 20: ...In this case the clock oscillator is required and must run at frequencies between 13 3 MHz to 17 MHz This mode however does not support continuous sample rates Only the following sample rates are allowed 8 kHz 11 025 kHz 12 kHz 16 kHz 22 05 kHz 24 kHz 32 kHz 44 1 kHz 48 kHz The sample rate detection allows a tolerance of 200 ppm at WSI If the oscillator is not used for automatic sample rate detect...

Page 21: ... the MAS 3507D An extension to the MPEG 2 layer 3 standard developed by FhG Erlangen Germany sometimes referenced as MPEG 2 5 for extremely low bit rates at sampling fre quencies of 12 11 025 or 8 kHz is also supported by the MAS 3507D 1 1 Features Serial asynchronous MPEG bit stream input SDI Parallel PIO DMA Input Broadcast and multimedia operation mode Automatic locking to given data rate in br...

Page 22: ...yed response of the host to the demand signal by several milliseconds or an interrupted response of the host will be tolerated by the MAS 3507D as long as the input buffer does not run empty A PC might use its DMA capabilities to transfer the data in the background to the MAS 3507D without interfering with its fore ground processes The source of the bit stream may be a memory e g ROM Flash or PC p...

Page 23: ...non cycle stealing background DMA that does not cause any computational overhead 2 2 Firmware Internal Program ROM A valid MPEG 1 2 2 5 layer 2 3 data signal is taken as input The signal lines are a clock line SIC and the data line SID The MPEG decoder performs the audio decoding The steps for decoding are synchronization side information extraction audio data decoding ancillary data extraction an...

Page 24: ... PI3 DCSO VSENS PR PCS PI19 PI18 PI17 PI16 PI15 PI14 PI13 POR I2CC I2CD VDD VSS TE DCEN EOD RTR RTW DCSG SIC SII SID XVSS XVDD PI4 PI8 SOC SOI SOD PI12 MAS 3507D 34 35 36 37 38 39 40 41 42 43 44 22 21 20 19 18 17 16 15 14 13 12 1 2 3 4 5 6 7 8 9 10 11 33 32 31 30 29 28 27 26 25 24 23 PI3 PI2 PI1 PI0 CLKO PUP WSEN WRDY AVDD CLKI AVSS PI13 PI14 PI15 PI16 PI17 PI18 PI19 PCS PR VSENS DCSO SIC SII SID ...

Page 25: ...duce inductor ringing ________________________Applications Pagers Wireless Phones Medical Devices Hand Held Computers PDAs RF Tags 1 to 3 Cell Hand Held Devices ____________________________Features 94 Efficient at 200mA Output Current 16µA Quiescent Supply Current Internal Synchronous Rectifier no external diode 0 1µA Logic Controlled Shutdown LBI LBO Low Battery Detector Selectable Current Limit ...

Page 26: ...Dissipation TA 70 C 8 Pin µMAX derate 4 1mW C above 70 C 330mW 10 Pin µMAX derate 5 6mW C above 70 C 444mW Operating Temperature Range 40 C to 85 C Junction Temperature 150 C Storage Temperature Range 65 C to 165 C Lead Temperature soldering 10sec 300 C TA 25 C RL 3kΩ Note 1 VLX 0 5 5V VOUT 5 5V TA 25 C MAX1675 MAX1676 CLSEL GND MAX1674 MAX1676 CLSEL OUT ILX 100mA FB OUT VOUT 3 3V VOUT 2V to 5 5V ...

Page 27: ...V VFB 1V VOUT 3 3V 0 8VOUT VIH 0 2VOUT VIL CLSEL Input Voltage V 0 8VOUT VIH 0 2VOUT VIL SHDN Input Voltage Ω 88 150 Damping Switch Resistance µA 0 07 1 ILBO LBO Off Leakage Current V 0 2 0 4 LBO Low Output Voltage nA 0 07 50 ISHDN SHDN Input Current µA 1 4 3 ICLSEL CLSEL Input Current nA 1 50 ILBI LBI Input Current nA 0 03 50 IFB FB Input Current µs 0 8 1 1 2 tOFF LX Switch Off Time µs 3 4 7 tON ...

Page 28: ...latches are provided as interfaces to external devices With a 16 bit CPU core that enables high speed 16 bit arithmetic computations and a variety of bit processing functions this general purpose microcontroller is optimally suited for Digital Audio devices such as a Mini Disc and an MP3 player The flash ROM version MSM66Q573L programmable with a single 2 4 V minimum power supply and flash ROM ver...

Page 29: ...p resistors 8 input only pins 16 bit free running timer 1ch Compare out capture input 2ch 16 bit timer auto reload timer out 1ch 8 bit auto reload timer 1ch 8 bit auto reload timer 3ch also fumctions as serial communication baud rate generator Watchdog timer also functions as 8 bit auto reload timer Watch timer real time counter 1ch Timers 8 bit PWM 4ch can also be used as 16 bit PWM 2ch Serial po...

Page 30: ...analog to digital converter The family includes a high precision 10 bit analog to digital converter with eight channels and is ideal for such analog control functions as processing audio signals processing sensor inputs detecting key switch states and controlling battery use in portable equipment Each channel has its own result register readily accessible from the software In addition to single ch...

Page 31: ... 16 bit Timer0 Peripheral SIO0 UART 8 bit Timer3 BRG SIO1 UART SYNC 8 bit Time4 BRG 8 bit PWM0 8 bit PWM1 SIO3 SYNC 8 bit Timer5 BRG 8 bit Timer6 WDT 8 bit Timer9 CAP CMP 16 bit FRC 10 bit A D Converter Interrupt PWMOUT0 PWMOUT2 PWMOUT1 PWMOUT3 TM9OUT TM9EVT CPCM0 CPCM1 VREF AGND AI0 to AI7 ALU Control ACC P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 System Control EA PSEN RD WR WAIT D0 to D7 A0 to A...

Page 32: ... 6 A6 P4 5 A5 P4 4 A4 P4 3 A3 P4 2 A2 P4 1 A1 P4 0 A0 GND P0 7 D7 P0 6 D6 P0 5 D5 P0 4 D4 P0 3 D3 P0 2 D2 P0 1 D1 P0 0 D0 P3 3 WR P3 2 RD P3 1 PSEN P11 7 TM9EVT P11 6 TM9OUT P11 3 XTOUT P11 2 CLKOUT P11 1 HOLD P11 0 WAIT V DD OSC1 OSC0 GND XT1 XT0 V DD EA NMI RES P5 7 TM0EVT P5 6 TM0OUT P5 5 CPCM1 P5 4 CPCM0 P6 7 P6 6 A16 P2 0 A17 P2 1 A18 P2 2 A19 P2 3 V DD V REF AI0 P12 0 AI1 P12 1 AI2 P12 2 AI3...

Page 33: ...esponds with 256 192 kbps for a stereo signal 1 10 1 12 by Layer 3 corresponds with 128 112 kbps for a stereo signal still maintaining the original CD sound quality By exploiting stereo effects and by limiting the audio bandwidth the coding schemes may achieve an acceptable sound quality at even lower bitrates MPEG Layer 3 is the most powerful member of the MPEG audio coding family For a given sou...

Page 34: ...nal Joint Stereo Joint stereo coding takes advatage of the fact that both channels of a stereo channel pair contain far the same information These stereophonic irrelevancies and redundancies are exploited to reduce the total bitrate Joint stereo is used in cases where only low bitrates are available but stereo signals are desired Quantization and Coding A system of two nested iteration loops is th...

Page 35: ...istortion loop To shape the quantization noise according to the masking threshold scalefactors are applied to each scalefactor band The systems starts with a default factor of 1 0 for each band If the quantization noise in a given band is found to exceed the masking threshold allowed noise as supplied by the perceptual model the scalefactor for this band is adjusted to reduce the quantization nois...